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  /external/libxaac/decoder/armv8/
ixheaacd_sbr_qmfsyn64_winadd.s 54 LD1 {v0.4h}, [x0], #8
58 LD1 {v1.4h}, [x2], #8
81 LD1 {v2.4h}, [x0], x8
86 LD1 {v3.4h}, [x2], x9
88 LD1 {v4.4h}, [x0], x8
91 LD1 {v5.4h}, [x2], x9
93 LD1 {v6.4h}, [x0], x8
96 LD1 {v7.4h}, [x2], x9
98 LD1 {v8.4h}, [x0], x8
101 LD1 {v9.4h}, [x2], x
    [all...]
ixheaacd_inv_dit_fft_8pt.s 33 LD1 {v1.s}[0], [x0], x5
34 LD1 {v2.s}[0], [x6], x5
35 LD1 {v1.s}[1], [x0], x5
36 LD1 {v2.s}[1], [x6], x5
37 LD1 {v3.s}[0], [x0], x5
38 LD1 {v4.s}[0], [x6], x5
39 LD1 {v3.s}[1], [x0], x5
40 LD1 {v4.s}[1], [x6], x5
41 LD1 {v5.s}[0], [x0], x5
42 LD1 {v6.s}[0], [x6], x
    [all...]
ixheaacd_sbr_qmf_analysis32_neon.s 91 // LD1 {v0.4h} , [x6], #8
92 // LD1 {v1.4h} , [x6], #8
100 // LD1 {v2.4h} , [x6], #8
101 // LD1 {v3.4h} , [x6], #8
143 LD1 {v0.4h}, [x0], #8
154 LD1 {v2.4h}, [x0], x6
168 LD1 {v4.4h}, [x0], x6
175 LD1 {v6.4h}, [x0], x6
182 LD1 {v8.4h}, [x0], x6
190 LD1 {v10.4h}, [x1], #
    [all...]
ixheaacd_cos_sin_mod_loop2.s 58 LD1 {v2.s}[0], [x3]
69 LD1 {v3.s}[0], [x3] // im = *psubband1;
77 LD1 {v2.s}[1], [x11] //re = *psubband12;
84 LD1 {v4.s}[0], [x10]
101 LD1 {v3.s}[1], [x11]
132 LD1 {v2.2s}, [x0]
133 LD1 {v3.2s}, [x10]
179 LD1 {v2.s}[0], [x3]
180 LD1 {v2.s}[1], [x11]
ixheaacd_calcmaxspectralline.s 35 LD1 {V0.4S}, [X0], #16
36 LD1 {V1.4S}, [X0], #16
ixheaacd_no_lap1.s 61 LD1 {V0.4S}, [X6], X8
64 LD1 {V6.4S}, [X6], X8
78 LD1 {V0.4S}, [X6], X8
92 LD1 {V6.4S}, [X6], X8
ixheaacd_overlap_add1.s 60 LD1 {V3.4S}, [X10], X12
96 LD1 {V4.4S}, [X1], #16
118 LD1 {V3.4S}, [X10], X12
146 LD1 {V4.4S}, [X1], #16
168 LD1 {V6.4S}, [X10], X12
188 LD1 {V4.4S}, [X1], #16
243 LD1 {V3.4S}, [X10], X12
262 LD1 {V4.4S}, [X1], #16
ixheaacd_overlap_add2.s 180 LD1 {V6.4S}, [X10], X12
208 LD1 {V14.4S}, [X10], X12
233 LD1 {V6.4S}, [X10], X12
255 LD1 {V14.4S}, [X10], X12
ixheaacd_pre_twiddle.s 405 LD1 {v1.s}[0], [x0], #4;
406 LD1 {v3.s}[0], [x0], #4;
407 LD1 {v1.s}[1], [x0]
418 LD1 {v6.s}[0], [x1], #4
419 LD1 {v4.s}[1], [x1], #4
420 LD1 {v6.s}[1], [x1], #4
ixheaacd_post_twiddle_overlap.s 35 //ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64
36 //ld1 { v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64
    [all...]
  /external/libhevc/decoder/arm64/
ihevcd_fmt_conv_420sp_to_420sp.s 114 LD1 {v0.8b},[x0],#8
115 LD1 {v1.8b},[x0],#8
116 LD1 {v2.8b},[x0],#8
117 LD1 {v3.8b},[x0],#8
134 LD1 {v0.8b},[x0],#8
135 LD1 {v1.8b},[x0],#8
136 LD1 {v2.8b},[x0],#8
137 LD1 {v3.8b},[x0],#8
172 LD1 {v0.8b},[x1],#8
173 LD1 {v1.8b},[x1],#
    [all...]
  /external/libhevc/common/arm64/
ihevc_inter_pred_chroma_copy.s 121 LD1 {v0.s}[0],[x0] //vld1_lane_u32((uint32_t *)pu1_src_tmp, src_tmp, 0)
125 LD1 {v0.s}[0],[x7],x2 //vld1_lane_u32((uint32_t *)pu1_src_tmp, src_tmp, 0)
128 LD1 {v0.s}[0],[x7],x2 //vld1_lane_u32((uint32_t *)pu1_src_tmp, src_tmp, 0)
131 LD1 {v0.s}[0],[x7],x2 //vld1_lane_u32((uint32_t *)pu1_src_tmp, src_tmp, 0)
152 LD1 {v0.s}[0],[x0] //vld1_lane_u32((uint32_t *)pu1_src_tmp, src_tmp, 0)
156 LD1 {v0.s}[0],[x7],x2 //vld1_lane_u32((uint32_t *)pu1_src_tmp, src_tmp, 0)
176 LD1 {v0.8b},[x0],#8 //vld1_u8(pu1_src_tmp)
179 LD1 {v1.8b},[x7],x2 //vld1_u8(pu1_src_tmp)
182 LD1 {v2.8b},[x7],x2 //vld1_u8(pu1_src_tmp)
184 LD1 {v3.8b},[x7],x2 //vld1_u8(pu1_src_tmp
    [all...]
ihevc_sao_band_offset_luma.s 100 LD1 {v1.8b},[x14],#8 //band_table.val[0]
103 LD1 {v2.8b},[x14],#8 //band_table.val[1]
110 LD1 {v3.8b},[x14],#8 //band_table.val[2]
114 LD1 {v4.8b},[x14],#8 //band_table.val[3]
118 LD1 {v0.8b},[x4],#8 //Load pu1_src[(ht - 1) * src_strd + col]
123 LD1 {v30.8b},[x6] //pi1_sao_offset load
205 LD1 {v13.8b},[x4] //au1_cur_row = vld1_u8(pu1_src_cpy)
208 LD1 {v15.8b},[x5] //au1_cur_row = vld1_u8(pu1_src_cpy)
210 LD1 {v17.8b},[x6] //au1_cur_row = vld1_u8(pu1_src_cpy)
212 LD1 {v19.8b},[x10] //au1_cur_row = vld1_u8(pu1_src_cpy
    [all...]
ihevc_sao_edge_offset_class1.s 116 LD1 {v6.8b},[x14] //edge_idx_tbl = vld1_s8(gi1_table_edge_idx)
117 LD1 {v7.8b},[x6] //offset_tbl = vld1_s8(pi1_sao_offset)
131 LD1 {v1.16b},[x9],#16 //pu1_top_row = vld1q_u8(pu1_src_top_cpy || pu1_src - src_strd)
132 LD1 {v3.16b},[x0],#16 //pu1_cur_row = vld1q_u8(pu1_src)
134 LD1 {v30.16b},[x12],#16 //vld1q_u8(pu1_src[(ht - 1) * src_strd])
145 LD1 {v18.16b},[x10] //pu1_next_row = vld1q_u8(pu1_src_cpy + src_strd)
149 LD1 {v30.16b},[x6] //II pu1_next_row = vld1q_u8(pu1_src_cpy + src_strd)
222 LD1 {v18.16b},[x10] //pu1_next_row = vld1q_u8(pu1_src_cpy + src_strd)
267 LD1 {v1.16b},[x9],#16 //pu1_top_row = vld1q_u8(pu1_src_top_cpy || pu1_src - src_strd)
268 LD1 {v3.16b},[x0],#16 //pu1_cur_row = vld1q_u8(pu1_src
    [all...]
ihevc_mem_fns.s 83 LD1 {v0.8b},[x1],#8
112 LD1 {v0.8b},[x1],#8
ihevc_sao_band_offset_chroma.s 114 LD1 {v1.8b},[x14],#8 //band_table_u.val[0]
119 LD1 {v2.8b},[x14],#8 //band_table_u.val[1]
123 LD1 {v3.8b},[x14],#8 //band_table_u.val[2]
131 LD1 {v4.8b},[x14],#8 //band_table_u.val[3]
135 LD1 {v0.8b},[x4],#8 //Load pu1_src[(ht - 1) * src_strd + col]
140 LD1 {v30.8b},[x7] //pi1_sao_offset_u load
160 LD1 {v9.8b},[x14],#8 //band_table_v.val[0]
163 LD1 {v10.8b},[x14],#8 //band_table_v.val[1]
219 LD1 {v11.8b},[x14],#8 //band_table_v.val[2]
222 LD1 {v12.8b},[x14],#8 //band_table_v.val[3
    [all...]
ihevc_sao_edge_offset_class1_chroma.s 136 LD1 {v6.8b},[x14] //edge_idx_tbl = vld1_s8(gi1_table_edge_idx)
137 LD1 {v7.8b},[x6] //offset_tbl_u = vld1_s8(pi1_sao_offset_u)
138 LD1 {v1.8b},[x7] //offset_tbl_v = vld1_s8(pi1_sao_offset_v)
152 LD1 {v28.16b},[x11],#16 //pu1_top_row = vld1q_u8(pu1_src_top_cpy || pu1_src - src_strd)
153 //LD1 {v29.8b},[x11],#8 //pu1_top_row = vld1q_u8(pu1_src_top_cpy || pu1_src - src_strd)
154 LD1 {v3.16b},[x0],#16 //pu1_cur_row = vld1q_u8(pu1_src)
155 //LD1 {v11.8b},[x0],#8 //pu1_cur_row = vld1q_u8(pu1_src)
157 LD1 {v30.16b},[x12],#16 //vld1q_u8(pu1_src[(ht - 1) * src_strd])
158 //LD1 {v31.8b},[x12],#8 //vld1q_u8(pu1_src[(ht - 1) * src_strd])
169 LD1 {v18.16b},[x10] //pu1_next_row = vld1q_u8(pu1_src_cpy + src_strd
    [all...]
ihevc_sao_edge_offset_class0.s 100 LD1 {v5.8b},[x14] //edge_idx_tbl = vld1_s8(gi1_table_edge_idx)
104 LD1 {v7.8b},[x8] //offset_tbl = vld1_s8(pi1_sao_offset)
110 LD1 {v0.8b},[x4],#8 //Load pu1_src[(ht - 1) * src_strd + col]
145 LD1 {v17.16b},[x12],x1 //pu1_cur_row = vld1q_u8(pu1_src_cpy)
152 LD1 {v26.16b},[x12] //II Iteration pu1_cur_row = vld1q_u8(pu1_src_cpy)
290 LD1 {v17.16b},[x12] //pu1_cur_row = vld1q_u8(pu1_src_cpy)
ihevc_sao_edge_offset_class2_chroma.s 122 LD1 {v0.8b},[x11],#8 //pu1_src[(ht - 1) * src_strd + col]
323 LD1 {v6.8b},[x6] //offset_tbl_u = vld1_s8(pi1_sao_offset_u)
332 LD1 {v7.8b},[x6] //offset_tbl_v = vld1_s8(pi1_sao_offset_v)
365 LD1 {v5.16b},[x0] //pu1_cur_row = vld1q_u8(pu1_src)
366 //LD1 {v13.8b},[x0] //pu1_cur_row = vld1q_u8(pu1_src)
381 LD1 {v3.16b},[x8] //pu1_top_row = vld1q_u8(pu1_src - src_strd - 2) || vld1q_u8(pu1_src_top_cpy - 2)
382 //LD1 {v11.8b},[x8] //pu1_top_row = vld1q_u8(pu1_src - src_strd - 2) || vld1q_u8(pu1_src_top_cpy - 2)
406 LD1 {v16.16b},[x8] //I pu1_next_row = vld1q_u8(pu1_src_cpy + src_strd)
407 //LD1 {v17.8b},[x8] //I pu1_next_row = vld1q_u8(pu1_src_cpy + src_strd)
454 LD1 {v30.8b},[x2] //edge_idx_tbl = vld1_s8(gi1_table_edge_idx
    [all...]
ihevc_sao_edge_offset_class3_chroma.s 119 LD1 {v0.8b},[x11],#8 //pu1_src[(ht - 1) * src_strd + col]
318 LD1 {v6.8b},[x6] //offset_tbl_u = vld1_s8(pi1_sao_offset_u)
320 LD1 {v7.8b},[x6] //offset_tbl_v = vld1_s8(pi1_sao_offset_v)
356 LD1 {v5.16b},[x0] //pu1_cur_row = vld1q_u8(pu1_src)
357 //LD1 {v13.8b},[x0] //pu1_cur_row = vld1q_u8(pu1_src)
367 LD1 {v3.16b},[x8] //pu1_top_row = vld1q_u8(pu1_src - src_strd + 2)
368 //LD1 {v11.8b},[x8] //pu1_top_row = vld1q_u8(pu1_src - src_strd + 2)
398 LD1 {v16.16b},[x11] //I pu1_next_row = vld1q_u8(pu1_src_cpy + src_strd)
399 //LD1 {v17.8b},[x11] //I pu1_next_row = vld1q_u8(pu1_src_cpy + src_strd)
440 LD1 {v28.8b},[x2] //edge_idx_tbl = vld1_s8(gi1_table_edge_idx
    [all...]
ihevc_sao_edge_offset_class2.s 108 LD1 {v0.8b},[x11],#8 //pu1_src[(ht - 1) * src_strd + col]
215 LD1 {v7.8b},[x6] //offset_tbl = vld1_s8(pi1_sao_offset)
222 LD1 {v6.8b},[x11] //edge_idx_tbl = vld1_s8(gi1_table_edge_idx)
264 LD1 {v3.16b},[x8] //pu1_top_row = vld1q_u8(pu1_src - src_strd - 1) || vld1q_u8(pu1_src_top_cpy - 1)
268 LD1 {v5.16b},[x0] //pu1_cur_row = vld1q_u8(pu1_src)
294 LD1 {v16.16b},[x8] //I pu1_next_row = vld1q_u8(pu1_src_cpy + src_strd)
360 LD1 {v16.16b},[x8] //II pu1_next_row = vld1q_u8(pu1_src_cpy + src_strd)
364 LD1 {v30.16b},[x11] //III pu1_next_row = vld1q_u8(pu1_src_cpy + src_strd)
476 LD1 {v16.16b},[x8] //pu1_next_row = vld1q_u8(pu1_src_cpy + src_strd)
581 LD1 {v3.16b},[x8] //pu1_top_row = vld1q_u8(pu1_src - src_strd - 1) || vld1q_u8(p (…)
    [all...]
ihevc_sao_edge_offset_class3.s 108 LD1 {v0.8b},[x11],#8 //pu1_src[(ht - 1) * src_strd + col]
227 LD1 {v7.8b},[x6] //offset_tbl = vld1_s8(pi1_sao_offset)
239 LD1 {v6.8b},[x6] //edge_idx_tbl = vld1_s8(gi1_table_edge_idx)
278 LD1 {v3.16b},[x8] //pu1_top_row = vld1q_u8(pu1_src - src_strd + 1)
282 LD1 {v5.16b},[x0] //pu1_cur_row = vld1q_u8(pu1_src)
304 LD1 {v16.16b},[x8] //I pu1_next_row = vld1q_u8(pu1_src_cpy + src_strd)
374 LD1 {v16.16b},[x8] //II pu1_next_row = vld1q_u8(pu1_src_cpy + src_strd)
378 LD1 {v30.16b},[x2] //III pu1_next_row = vld1q_u8(pu1_src_cpy + src_strd)
500 LD1 {v16.16b},[x8] //pu1_next_row = vld1q_u8(pu1_src_cpy + src_strd)
606 LD1 {v3.16b},[x8] //pu1_top_row = vld1q_u8(pu1_src - src_strd + 1
    [all...]
ihevc_sao_edge_offset_class0_chroma.s 118 LD1 {v7.8b},[x8] //offset_tbl = vld1_s8(pi1_sao_offset_u)
122 LD1 {v5.8b},[x14] //edge_idx_tbl = vld1_s8(gi1_table_edge_idx)
126 LD1 {v0.8b},[x4],#8 //Load pu1_src[(ht - 1) * src_strd + col]
133 LD1 {v0.8b},[x5] //offset_tbl = vld1_s8(pi1_sao_offset_v)
165 LD1 {v19.16b},[x12],x1 //pu1_cur_row = vld1q_u8(pu1_src_cpy)
166 //LD1 {v13.8b},[x12],x1 //pu1_cur_row = vld1q_u8(pu1_src_cpy)
174 LD1 {v30.16b},[x12] //II Iteration pu1_cur_row = vld1q_u8(pu1_src_cpy)
175 //LD1 {v31.8b},[x12] //II Iteration pu1_cur_row = vld1q_u8(pu1_src_cpy)
349 LD1 {v19.16b},[x12],x1 //pu1_cur_row = vld1q_u8(pu1_src_cpy)
350 //LD1 {v13.8b},[x12],x1 //pu1_cur_row = vld1q_u8(pu1_src_cpy
    [all...]
  /prebuilts/go/darwin-x86/src/cmd/vendor/golang.org/x/arch/arm64/arm64asm/
tables.go 170 LD1
639 LD1: "LD1",
    [all...]
  /prebuilts/go/linux-x86/src/cmd/vendor/golang.org/x/arch/arm64/arm64asm/
tables.go 170 LD1
639 LD1: "LD1",
    [all...]

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