| /external/v8/src/mips64/ |
| codegen-mips64.cc | 87 __ lwr(t8, MemOperand(a1));
89 __ swr(t8, MemOperand(a0));
92 __ lwl(t8, MemOperand(a1));
94 __ swl(t8, MemOperand(a0));
118 __ Pref(pref_hint_load, MemOperand(a1, 0 * pref_chunk));
119 __ Pref(pref_hint_load, MemOperand(a1, 1 * pref_chunk));
120 __ Pref(pref_hint_load, MemOperand(a1, 2 * pref_chunk));
121 __ Pref(pref_hint_load, MemOperand(a1, 3 * pref_chunk));
124 __ Pref(pref_hint_store, MemOperand(a0, 1 * pref_chunk));
125 __ Pref(pref_hint_store, MemOperand(a0, 2 * pref_chunk))
[all...] |
| deoptimizer-mips64.cc | 125 __ sdc1(fpu_reg, MemOperand(sp, offset));
133 __ sd(ToRegister(i), MemOperand(sp, kPointerSize * i));
138 __ sd(fp, MemOperand(a2));
144 __ ld(a2, MemOperand(sp, kSavedRegistersAreaSize));
160 __ ld(a1, MemOperand(fp, CommonFrameConstants::kContextOrFrameTypeOffset));
162 __ ld(a0, MemOperand(fp, JavaScriptFrameConstants::kFunctionOffset));
180 __ ld(a1, MemOperand(v0, Deoptimizer::input_offset()));
187 __ ld(a2, MemOperand(sp, i * kPointerSize));
188 __ sd(a2, MemOperand(a1, offset));
191 __ sd(a2, MemOperand(a1, offset))
[all...] |
| /external/v8/src/mips/ |
| codegen-mips.cc | 87 __ lwr(t8, MemOperand(a1));
89 __ swr(t8, MemOperand(a0));
92 __ lwl(t8, MemOperand(a1));
94 __ swl(t8, MemOperand(a0));
117 __ Pref(pref_hint_load, MemOperand(a1, 0 * pref_chunk));
118 __ Pref(pref_hint_load, MemOperand(a1, 1 * pref_chunk));
119 __ Pref(pref_hint_load, MemOperand(a1, 2 * pref_chunk));
120 __ Pref(pref_hint_load, MemOperand(a1, 3 * pref_chunk));
123 __ Pref(pref_hint_store, MemOperand(a0, 1 * pref_chunk));
124 __ Pref(pref_hint_store, MemOperand(a0, 2 * pref_chunk))
[all...] |
| deoptimizer-mips.cc | 125 __ sdc1(fpu_reg, MemOperand(sp, offset));
133 __ sw(ToRegister(i), MemOperand(sp, kPointerSize * i));
138 __ sw(fp, MemOperand(a2));
144 __ lw(a2, MemOperand(sp, kSavedRegistersAreaSize));
160 __ lw(a1, MemOperand(fp, CommonFrameConstants::kContextOrFrameTypeOffset));
162 __ lw(a0, MemOperand(fp, JavaScriptFrameConstants::kFunctionOffset));
180 __ lw(a1, MemOperand(v0, Deoptimizer::input_offset()));
187 __ lw(a2, MemOperand(sp, i * kPointerSize));
188 __ sw(a2, MemOperand(a1, offset));
191 __ sw(a2, MemOperand(a1, offset))
[all...] |
| /external/vixl/benchmarks/aarch32/ |
| asm-disasm-speed-test.cc | 204 __ ldr(Narrow, r6, MemOperand(r7));
212 __ str(Narrow, r0, MemOperand(r4, 12));
213 __ str(Narrow, r5, MemOperand(r4, 16));
214 __ str(Narrow, r5, MemOperand(r4, 20));
215 __ strb(r5, MemOperand(r4, 48));
216 __ str(Narrow, r5, MemOperand(r4, 64));
217 __ str(Narrow, r5, MemOperand(r4, 88));
218 __ str(Narrow, r5, MemOperand(r4, 112));
219 __ str(r5, MemOperand(r4, 136));
220 __ strb(Narrow, r3, MemOperand(r4, 24))
[all...] |
| /external/v8/src/crankshaft/arm64/ |
| delayed-masm-arm64.cc | 19 MemOperand src_operand = cgen_->ToMemOperand(src);
20 MemOperand dst_operand = cgen_->ToMemOperand(dst);
26 switch (MemOperand::AreConsistentForPair(pending_address_src_,
28 case MemOperand::kNotPair:
32 case MemOperand::kPairAB:
35 case MemOperand::kPairBA:
39 switch (MemOperand::AreConsistentForPair(pending_address_dst_,
41 case MemOperand::kNotPair:
45 case MemOperand::kPairAB:
48 case MemOperand::kPairBA
[all...] |
| delayed-masm-arm64.h | 79 void StoreConstant(uint64_t value, const MemOperand& operand);
80 void Load(const CPURegister& rd, const MemOperand& operand);
81 void Store(const CPURegister& rd, const MemOperand& operand);
89 MemOperand tmp;
143 MemOperand pending_address_src_;
145 MemOperand pending_address_dst_;
|
| /external/vixl/test/aarch32/ |
| test-disasm-a32.cc | 643 COMPARE_BOTH(Ldr(r0, MemOperand(r1, 0xfff123)),
647 COMPARE_BOTH(Ldr(r0, MemOperand(r1, 0xff123)),
650 COMPARE_BOTH(Ldr(r0, MemOperand(r1, -0xff123)),
654 COMPARE_A32(Ldr(r0, MemOperand(r1, 0xfff123, PreIndex)),
658 COMPARE_A32(Ldr(r0, MemOperand(r1, 0xff123, PreIndex)),
661 COMPARE_A32(Ldr(r0, MemOperand(r1, -0xff123, PreIndex)),
665 COMPARE_T32(Ldr(r0, MemOperand(r1, 0xfff12, PreIndex)),
669 COMPARE_T32(Ldr(r0, MemOperand(r1, 0xff12, PreIndex)),
672 COMPARE_T32(Ldr(r0, MemOperand(r1, -0xff12, PreIndex)),
676 COMPARE_A32(Ldr(r0, MemOperand(r1, 0xfff123, PostIndex))
[all...] |
| /external/v8/src/s390/ |
| deoptimizer-s390.cc | 118 __ lay(sp, MemOperand(sp, -kDoubleRegsSize));
124 __ StoreDouble(dreg, MemOperand(sp, offset));
128 __ lay(sp, MemOperand(sp, -kNumberOfRegisters * kPointerSize));
129 __ StoreMultipleP(r0, sp, MemOperand(sp)); // Save all 16 registers
132 __ StoreP(fp, MemOperand(ip));
138 __ LoadP(r4, MemOperand(sp, kSavedRegistersAreaSize));
147 __ la(r6, MemOperand(sp, kSavedRegistersAreaSize + (1 * kPointerSize)));
155 __ LoadP(r3, MemOperand(fp, CommonFrameConstants::kContextOrFrameTypeOffset));
157 __ LoadP(r2, MemOperand(fp, JavaScriptFrameConstants::kFunctionOffset));
165 __ StoreP(r7, MemOperand(sp, kStackFrameExtraParamSlot * kPointerSize))
[all...] |
| macro-assembler-s390.h | 35 // Generate a MemOperand for loading a field from an object.
36 inline MemOperand FieldMemOperand(Register object, int offset) {
37 return MemOperand(object, offset - kHeapObjectTag);
40 // Generate a MemOperand for loading a field from an object.
41 inline MemOperand FieldMemOperand(Register object, Register index, int offset) {
42 return MemOperand(object, index, offset - kHeapObjectTag);
45 // Generate a MemOperand for loading a field from Root register
46 inline MemOperand RootMemOperand(Heap::RootListIndex index) {
47 return MemOperand(kRootRegister, index << kPointerSizeLog2);
263 void Add32(Register dst, const MemOperand& opnd)
[all...] |
| assembler-s390.h | 336 // Class MemOperand represents a memory operand in load and store instructions
341 class MemOperand BASE_EMBEDDED {
343 explicit MemOperand(Register rx, Disp offset = 0);
344 explicit MemOperand(Register rx, Register rb, Disp offset = 0);
705 inline void name(R1 r1, const MemOperand& opnd) { \
721 void bc(Condition cond, const MemOperand& opnd) {
736 inline void name(R1 r1, const MemOperand& opnd) { \
754 void pfd(Condition cond, const MemOperand& opnd) {
862 void name(Register r1, const MemOperand& opnd); \
866 void name(Register r1, Register r3, const MemOperand& opnd);
[all...] |
| /external/vixl/test/aarch64/ |
| test-disasm-aarch64.cc | [all...] |
| test-abi.cc | 97 CHECK_NEXT_PARAMETER_MEM(int, MemOperand(sp, 0), kWRegSizeInBytes);
98 CHECK_NEXT_PARAMETER_MEM(int, MemOperand(sp, 8), kWRegSizeInBytes);
103 CHECK_NEXT_PARAMETER_MEM(double, MemOperand(sp, 16), kDRegSizeInBytes);
104 CHECK_NEXT_PARAMETER_MEM(bool, MemOperand(sp, 24), kWRegSizeInBytes);
106 MemOperand(sp, 32),
108 CHECK_NEXT_PARAMETER_MEM(float, MemOperand(sp, 40), kSRegSizeInBytes);
109 CHECK_NEXT_PARAMETER_MEM(float, MemOperand(sp, 48), kSRegSizeInBytes);
|
| test-trace-aarch64.cc | 152 __ ldar(w3, MemOperand(x0));
153 __ ldar(x4, MemOperand(x0));
154 __ ldarb(w5, MemOperand(x0));
155 __ ldarb(x6, MemOperand(x0));
156 __ ldarh(w7, MemOperand(x0));
157 __ ldarh(x8, MemOperand(x0));
158 __ ldaxp(w9, w10, MemOperand(x0));
159 __ ldaxp(x11, x12, MemOperand(x0));
160 __ ldaxr(w13, MemOperand(x0));
161 __ ldaxr(x14, MemOperand(x0))
[all...] |
| test-assembler-aarch64.cc | [all...] |
| /external/v8/src/regexp/s390/ |
| regexp-macro-assembler-s390.cc | 185 __ LoadP(r3, MemOperand(frame_pointer(), kStringStartMinusOne));
193 __ LoadP(r3, MemOperand(frame_pointer(), kStringStartMinusOne));
207 __ CmpP(current_input_offset(), MemOperand(backtrack_stackpointer(), 0));
230 __ LoadP(r5, MemOperand(frame_pointer(), kStringStartMinusOne));
259 __ LoadlB(r5, MemOperand(r2, r1));
260 __ LoadlB(r6, MemOperand(r4, r1));
281 __ la(r1, MemOperand(r1, char_size()));
376 __ LoadP(r5, MemOperand(frame_pointer(), kStringStartMinusOne));
387 __ la(r2, MemOperand(r2, end_of_input_address()));
388 __ la(r4, MemOperand(current_input_offset(), end_of_input_address()))
[all...] |
| /external/v8/src/ppc/ |
| deoptimizer-ppc.cc | 132 __ stfd(dreg, MemOperand(sp, offset));
140 __ StoreP(ToRegister(i), MemOperand(sp, kPointerSize * i));
145 __ StoreP(fp, MemOperand(ip));
151 __ LoadP(r5, MemOperand(sp, kSavedRegistersAreaSize));
166 __ LoadP(r4, MemOperand(fp, CommonFrameConstants::kContextOrFrameTypeOffset));
168 __ LoadP(r3, MemOperand(fp, JavaScriptFrameConstants::kFunctionOffset));
183 __ LoadP(r4, MemOperand(r3, Deoptimizer::input_offset()));
189 __ LoadP(r5, MemOperand(sp, i * kPointerSize));
190 __ StoreP(r5, MemOperand(r4, offset));
200 __ lfd(d0, MemOperand(sp, src_offset))
[all...] |
| /external/vixl/examples/aarch64/ |
| add2-vectors.cc | 56 __ Ld1(v0.V16B(), MemOperand(x0));
57 __ Ld1(v1.V16B(), MemOperand(x1, 16, PostIndex));
59 __ St1(v0.V16B(), MemOperand(x0, 16, PostIndex));
71 __ Ldrb(w5, MemOperand(x0));
72 __ Ldrb(w6, MemOperand(x1, 1, PostIndex));
74 __ Strb(w5, MemOperand(x0, 1, PostIndex));
|
| /external/v8/src/arm/ |
| deoptimizer-arm.cc | 143 __ str(fp, MemOperand(ip));
149 __ ldr(r2, MemOperand(sp, kSavedRegistersAreaSize));
164 __ ldr(r1, MemOperand(fp, CommonFrameConstants::kContextOrFrameTypeOffset));
166 __ ldr(r0, MemOperand(fp, JavaScriptFrameConstants::kFunctionOffset));
171 __ str(r4, MemOperand(sp, 0 * kPointerSize)); // Fp-to-sp delta.
173 __ str(r5, MemOperand(sp, 1 * kPointerSize)); // Isolate.
182 __ ldr(r1, MemOperand(r0, Deoptimizer::input_offset()));
188 __ ldr(r2, MemOperand(sp, i * kPointerSize));
189 __ str(r2, MemOperand(r1, offset));
209 __ ldr(r2, MemOperand(r1, FrameDescription::frame_size_offset()))
[all...] |
| /external/v8/src/arm64/ |
| deoptimizer-arm64.cc | 109 __ Str(fp, MemOperand(x3));
135 __ Ldr(x1, MemOperand(fp, CommonFrameConstants::kContextOrFrameTypeOffset));
137 __ Ldr(x0, MemOperand(fp, JavaScriptFrameConstants::kFunctionOffset));
156 __ Ldr(x1, MemOperand(deoptimizer, Deoptimizer::input_offset()));
165 __ Str(x2, MemOperand(x1, offset));
176 __ Str(x2, MemOperand(x1, dst_offset));
185 __ Ldr(unwind_limit, MemOperand(x1, FrameDescription::frame_size_offset()));
197 __ Str(x4, MemOperand(x3, kPointerSize, PostIndex));
214 MemOperand(x4, Deoptimizer::caller_frame_top_offset()));
219 __ Ldrsw(x1, MemOperand(x4, Deoptimizer::output_count_offset()))
[all...] |
| /external/v8/src/regexp/mips/ |
| regexp-macro-assembler-mips.cc | 185 __ lw(a1, MemOperand(frame_pointer(), kStringStartMinusOne));
193 __ lw(a1, MemOperand(frame_pointer(), kStringStartMinusOne));
207 __ lw(a0, MemOperand(backtrack_stackpointer(), 0));
230 __ lw(t0, MemOperand(frame_pointer(), kStringStartMinusOne));
259 __ lbu(a3, MemOperand(a0, 0));
261 __ lbu(t0, MemOperand(a2, 0));
346 __ lw(end_of_input_address(), MemOperand(frame_pointer(), kInputEnd));
379 __ lw(t0, MemOperand(frame_pointer(), kStringStartMinusOne));
405 __ lbu(a3, MemOperand(a0, 0));
407 __ lbu(t0, MemOperand(a2, 0))
[all...] |
| /external/v8/src/regexp/mips64/ |
| regexp-macro-assembler-mips64.cc | 221 __ ld(a1, MemOperand(frame_pointer(), kStringStartMinusOne));
229 __ ld(a1, MemOperand(frame_pointer(), kStringStartMinusOne));
243 __ lw(a0, MemOperand(backtrack_stackpointer(), 0));
266 __ ld(t1, MemOperand(frame_pointer(), kStringStartMinusOne));
295 __ lbu(a3, MemOperand(a0, 0));
297 __ lbu(a4, MemOperand(a2, 0));
382 __ ld(end_of_input_address(), MemOperand(frame_pointer(), kInputEnd));
415 __ ld(t1, MemOperand(frame_pointer(), kStringStartMinusOne));
435 __ lbu(a3, MemOperand(a0, 0));
437 __ lbu(a4, MemOperand(a2, 0))
[all...] |
| /external/v8/src/regexp/arm/ |
| regexp-macro-assembler-arm.cc | 179 __ ldr(r1, MemOperand(frame_pointer(), kStringStartMinusOne));
188 __ ldr(r1, MemOperand(frame_pointer(), kStringStartMinusOne));
203 __ ldr(r0, MemOperand(backtrack_stackpointer(), 0));
225 __ ldr(r3, MemOperand(frame_pointer(), kStringStartMinusOne));
254 __ ldrb(r3, MemOperand(r0, char_size(), PostIndex));
255 __ ldrb(r4, MemOperand(r2, char_size(), PostIndex));
368 __ ldr(r3, MemOperand(frame_pointer(), kStringStartMinusOne));
389 __ ldrb(r3, MemOperand(r0, char_size(), PostIndex));
390 __ ldrb(r4, MemOperand(r2, char_size(), PostIndex));
393 __ ldrh(r3, MemOperand(r0, char_size(), PostIndex))
[all...] |
| /art/compiler/utils/arm/ |
| assembler_arm_vixl.cc | 94 ___ Ldr(temp, MemOperand(tr, Thread::IsGcMarkingOffset<kArmPointerSize>().Int32Value()));
281 ___ Strb(reg, MemOperand(base, offset));
284 ___ Strh(reg, MemOperand(base, offset));
287 ___ Str(reg, MemOperand(base, offset));
290 ___ Strd(reg, vixl32::Register(reg.GetCode() + 1), MemOperand(base, offset));
335 ___ Ldrsb(dest, MemOperand(base, offset));
338 ___ Ldrb(dest, MemOperand(base, offset));
341 ___ Ldrsh(dest, MemOperand(base, offset));
344 ___ Ldrh(dest, MemOperand(base, offset));
348 ___ Ldr(dest, MemOperand(base, offset))
[all...] |
| /external/vixl/src/aarch64/ |
| operands-aarch64.cc | 372 // MemOperand
373 MemOperand::MemOperand()
382 MemOperand::MemOperand(Register base, int64_t offset, AddrMode addrmode)
394 MemOperand::MemOperand(Register base,
414 MemOperand::MemOperand(Register base,
431 MemOperand::MemOperand(Register base, const Operand& offset, AddrMode addrmode
[all...] |
