| /external/llvm/test/MC/MachO/AArch64/ |
| darwin-ARM64-reloc.s | 38 ; CHECK-NEXT: Section __text {
39 ; CHECK-NEXT: Relocation {
40 ; CHECK-NEXT: Offset: 0x24
41 ; CHECK-NEXT: PCRel: 1
42 ; CHECK-NEXT: Length: 2
43 ; CHECK-NEXT: Type: ARM64_RELOC_PAGE21 (3)
44 ; CHECK-NEXT: Symbol: L_.str
45 ; CHECK-NEXT: }
46 ; CHECK-NEXT: Relocation {
47 ; CHECK-NEXT: Offset: 0x2
[all...] |
| /external/swiftshader/third_party/LLVM/test/MC/AsmParser/ |
| section.s | 49 # CHECK-NEXT: ('sh_type', 0x00000001)
50 # CHECK-NEXT: ('sh_flags', 0x00000000)
51 # CHECK-NEXT: ('sh_addr', 0x00000000)
52 # CHECK-NEXT: ('sh_offset', 0x00000034)
53 # CHECK-NEXT: ('sh_size', 0x00000007)
54 # CHECK-NEXT: ('sh_link', 0x00000000)
55 # CHECK-NEXT: ('sh_info', 0x00000000)
56 # CHECK-NEXT: ('sh_addralign', 0x00000001)
57 # CHECK-NEXT: ('sh_entsize', 0x00000000)
58 # CHECK-NEXT: ('_section_data', '01010101 010101'
[all...] |
| /external/llvm/test/MC/AsmParser/ |
| section.s | 52 # CHECK-NEXT: Type: SHT_PROGBITS
53 # CHECK-NEXT: Flags [ (0x0)
54 # CHECK-NEXT: ]
55 # CHECK-NEXT: Address: 0x0
56 # CHECK-NEXT: Offset: 0x34
57 # CHECK-NEXT: Size: 7
58 # CHECK-NEXT: Link: 0
59 # CHECK-NEXT: Info: 0
60 # CHECK-NEXT: AddressAlignment: 1
61 # CHECK-NEXT: EntrySize:
[all...] |
| /external/libxkbcommon/xkbcommon/test/ |
| keyseq.c | 11 * The above copyright notice and this permission notice (including the next
40 KEY_H, BOTH, XKB_KEY_h, NEXT,
41 KEY_E, BOTH, XKB_KEY_e, NEXT,
42 KEY_L, BOTH, XKB_KEY_l, NEXT,
43 KEY_L, BOTH, XKB_KEY_l, NEXT,
48 KEY_H, BOTH, XKB_KEY_h, NEXT,
49 KEY_LEFTSHIFT, DOWN, XKB_KEY_Shift_L, NEXT,
50 KEY_E, BOTH, XKB_KEY_E, NEXT,
51 KEY_L, BOTH, XKB_KEY_L, NEXT,
52 KEY_LEFTSHIFT, UP, XKB_KEY_Shift_L, NEXT,
[all...] |
| /external/llvm/test/MC/ARM/ |
| eh-link.s | 12 @ CHECK-NEXT: Name: .text
13 @ CHECK-NEXT: Type: SHT_PROGBITS
14 @ CHECK-NEXT: Flags [
15 @ CHECK-NEXT: SHF_ALLOC
16 @ CHECK-NEXT: SHF_EXECINSTR
17 @ CHECK-NEXT: SHF_GROUP
18 @ CHECK-NEXT: ]
19 @ CHECK-NEXT: Address: 0x0
20 @ CHECK-NEXT: Offset:
21 @ CHECK-NEXT: Size:
[all...] |
| arm-elf-symver.s | 26 @ CHECK-NEXT: Section {{.*}} .rel.text {
27 @ CHECK-NEXT: 0x0 R_ARM_ABS32 .text 0x0
28 @ CHECK-NEXT: 0x4 R_ARM_ABS32 bar2@zed 0x0
29 @ CHECK-NEXT: 0x8 R_ARM_ABS32 .text 0x0
30 @ CHECK-NEXT: 0xC R_ARM_ABS32 .text 0x0
31 @ CHECK-NEXT: 0x10 R_ARM_ABS32 bar6@zed 0x0
32 @ CHECK-NEXT: }
33 @ CHECK-NEXT: ]
37 @ CHECK-NEXT: Value: 0x0
38 @ CHECK-NEXT: Size:
[all...] |
| elf-movt.s | 15 @ ASM-NEXT: movt r0, :upper16:(GOT-(.LPC0_2+8))
20 @ OBJ-NEXT: Type: SHT_PROGBITS
21 @ OBJ-NEXT: Flags [ (0x6)
22 @ OBJ-NEXT: SHF_ALLOC
23 @ OBJ-NEXT: SHF_EXECINSTR
24 @ OBJ-NEXT: ]
25 @ OBJ-NEXT: Address: 0x0
26 @ OBJ-NEXT: Offset: 0x34
27 @ OBJ-NEXT: Size: 8
28 @ OBJ-NEXT: Link:
[all...] |
| directive-literals.s | 10 @ CHECK-NEXT: .short 0
11 @ CHECK-NEXT: .short 57086
18 @ CHECK-NEXT: .short 0
19 @ CHECK-NEXT: .short 57086
25 @ CHECK-NEXT: .long 3
|
| directive-eabi_attribute.s | 14 @ CHECK-OBJ-NEXT: TagName: conformance
15 @ CHECK-OBJ-NEXT: Value: 2.09
19 @ CHECK-OBJ-NEXT: TagName: CPU_raw_name
20 @ CHECK-OBJ-NEXT: Value: Cortex-A9
24 @ CHECK-OBJ-NEXT: TagName: CPU_name
25 @ CHECK-OBJ-NEXT: Value: cortex-a9
29 @ CHECK-OBJ-NEXT: Value: 10
30 @ CHECK-OBJ-NEXT: TagName: CPU_arch
31 @ CHECK-OBJ-NEXT: Description: ARM v7
35 @ CHECK-OBJ-NEXT: Value: 6
[all...] |
| directive-align.s | 10 @ CHECK-NEXT: .byte 1
11 @ CHECK-NEXT: .p2align 2
18 @ CHECK-NEXT: .long 487637477
19 @ CHECK-NEXT: .p2align 2
26 @ CHECK-NEXT: .long 3517645084
27 @ CHECK-NEXT: .p2align 2
|
| /external/llvm/test/MC/SystemZ/ |
| word.s | 9 # CHECK-NEXT: Type: SHT_PROGBITS
10 # CHECK-NEXT: Flags [
11 # CHECK-NEXT: SHF_ALLOC
12 # CHECK-NEXT: SHF_WRITE
13 # CHECK-NEXT: ]
14 # CHECK-NEXT: Address: 0x0
15 # CHECK-NEXT: Offset:
16 # CHECK-NEXT: Size: 2
17 # CHECK-NEXT: Link: 0
18 # CHECK-NEXT: Info:
[all...] |
| /external/llvm/test/MC/MachO/ARM/ |
| static-movt-relocs.s | 10 @ CHECK-NEXT: Section __text {
11 @ CHECK-NEXT: Relocation {
12 @ CHECK-NEXT: Offset: 0x4
13 @ CHECK-NEXT: PCRel: 0
14 @ CHECK-NEXT: Length: 3
15 @ CHECK-NEXT: Type: ARM_RELOC_HALF (8)
16 @ CHECK-NEXT: Symbol: bar
17 @ CHECK-NEXT: }
18 @ CHECK-NEXT: Relocation {
19 @ CHECK-NEXT: Offset: 0x1
[all...] |
| /external/clang/test/Misc/ |
| warning-flags.c | 22 CHECK-NEXT: ext_excess_initializers
23 CHECK-NEXT: ext_excess_initializers_in_char_array_initializer
24 CHECK-NEXT: ext_expected_semi_decl_list
25 CHECK-NEXT: ext_explicit_specialization_storage_class
26 CHECK-NEXT: ext_initializer_string_for_char_array_too_long
27 CHECK-NEXT: ext_missing_declspec
28 CHECK-NEXT: ext_missing_whitespace_after_macro_name
29 CHECK-NEXT: ext_new_paren_array_nonconst
30 CHECK-NEXT: ext_plain_complex
31 CHECK-NEXT: ext_template_arg_extra_paren
[all...] |
| /external/llvm/test/CodeGen/Mips/ |
| mips-shf-gprel.s | 14 # CHECK-NEXT: Type: SHT_PROGBITS
15 # CHECK-NEXT: Flags [ (0x10000003)
16 # CHECK-NEXT: SHF_ALLOC
17 # CHECK-NEXT: SHF_MIPS_GPREL
18 # CHECK-NEXT: SHF_WRITE
19 # CHECK-NEXT: ]
22 # CHECK-NEXT: Type: SHT_NOBITS
23 # CHECK-NEXT: Flags [ (0x10000003)
24 # CHECK-NEXT: SHF_ALLOC
25 # CHECK-NEXT: SHF_MIPS_GPRE
[all...] |
| /external/llvm/test/MC/Lanai/ |
| memory.s | 9 ! CHECK-NEXT: <MCInst #{{[0-9]+}} LDW_RI{{$}}
10 ! CHECK-NEXT: <MCOperand Reg:13>
11 ! CHECK-NEXT: <MCOperand Reg:14>
12 ! CHECK-NEXT: <MCOperand Imm:0>
13 ! CHECK-NEXT: <MCOperand Imm:0>
17 ! CHECK-NEXT: <MCInst #{{[0-9]+}} LDW_RI{{$}}
18 ! CHECK-NEXT: <MCOperand Reg:13>
19 ! CHECK-NEXT: <MCOperand Reg:13>
20 ! CHECK-NEXT: <MCOperand Imm:0>
21 ! CHECK-NEXT: <MCOperand Imm:0
[all...] |
| conditional_inst.s | 9 ! CHECK-NEXT: <MCInst #{{[0-9]+}} JR{{$}}
10 ! CHECK-NEXT: <MCOperand Reg:12>>
15 ! CHECK-NEXT: <MCInst #{{[0-9]+}} BT{{$}}
16 ! CHECK-NEXT: <MCOperand Imm:4660>
21 ! CHECK-NEXT: <MCInst #{{[0-9]+}} BRCC{{$}}
22 ! CHECK-NEXT: <MCOperand Imm:2000>
23 ! CHECK-NEXT: <MCOperand Imm:13>
28 ! CHECK-NEXT: fixup A - offset: 0, value: jump1, kind: FIXUP_LANAI_25
29 ! CHECK-NEXT: <MCInst #{{[0-9]+}} BRCC{{$}}
30 ! CHECK-NEXT: <MCOperand Expr:(jump1)
[all...] |
| /external/llvm/test/MC/PowerPC/ |
| ppc-llong.s | 14 # CHECK-NEXT: Type: SHT_PROGBITS
15 # CHECK-NEXT: Flags [
16 # CHECK-NEXT: SHF_ALLOC
17 # CHECK-NEXT: SHF_WRITE
18 # CHECK-NEXT: ]
19 # CHECK-NEXT: Address: 0x0
20 # CHECK-NEXT: Offset:
21 # CHECK-NEXT: Size: 8
22 # CHECK-NEXT: Link: 0
23 # CHECK-NEXT: Info:
[all...] |
| ppc-word.s | 14 # CHECK-NEXT: Type: SHT_PROGBITS
15 # CHECK-NEXT: Flags [
16 # CHECK-NEXT: SHF_ALLOC
17 # CHECK-NEXT: SHF_WRITE
18 # CHECK-NEXT: ]
19 # CHECK-NEXT: Address: 0x0
20 # CHECK-NEXT: Offset:
21 # CHECK-NEXT: Size: 2
22 # CHECK-NEXT: Link: 0
23 # CHECK-NEXT: Info:
[all...] |
| ppc64-initial-cfa.s | 17 # STATIC-NEXT: Type: SHT_PROGBITS
18 # STATIC-NEXT: Flags [ (0x2)
19 # STATIC-NEXT: SHF_ALLOC
20 # STATIC-NEXT: ]
21 # STATIC-NEXT: Address:
22 # STATIC-NEXT: Offset:
23 # STATIC-NEXT: Size: 40
24 # STATIC-NEXT: Link: 0
25 # STATIC-NEXT: Info: 0
26 # STATIC-NEXT: AddressAlignment:
[all...] |
| ppc64-fixup-apply.s | 66 # CHECK-NEXT: Type: SHT_PROGBITS
67 # CHECK-NEXT: Flags [
68 # CHECK-NEXT: SHF_ALLOC
69 # CHECK-NEXT: SHF_EXECINSTR
70 # CHECK-NEXT: ]
71 # CHECK-NEXT: Address: 0x0
72 # CHECK-NEXT: Offset:
73 # CHECK-NEXT: Size: 72
74 # CHECK-NEXT: Link: 0
75 # CHECK-NEXT: Info:
[all...] |
| /external/llvm/test/MC/Mips/ |
| mips64eb-fixups.s | 28 # CHECK-NEXT: Type: SHT_PROGBITS (0x1)
29 # CHECK-NEXT: Flags [ (0x0)
30 # CHECK-NEXT: ]
31 # CHECK-NEXT: Address: 0x0
32 # CHECK-NEXT: Offset: 0x40
33 # CHECK-NEXT: Size: 21
34 # CHECK-NEXT: Link: 0
35 # CHECK-NEXT: Info: 0
36 # CHECK-NEXT: AddressAlignment: 1
37 # CHECK-NEXT: EntrySize:
[all...] |
| mips-hwr-register-names.s | 10 # CHECK-NEXT: .set mips32r2
11 # CHECK-NEXT: rdhwr $4, $hwr_cpunum
12 # CHECK-NEXT: .set pop # encoding: [0x7c,0x04,0x00,0x3b]
15 # CHECK-NEXT: .set mips32r2
16 # CHECK-NEXT: rdhwr $4, $hwr_cpunum
17 # CHECK-NEXT: .set pop # encoding: [0x7c,0x04,0x00,0x3b]
21 # CHECK-NEXT: .set mips32r2
22 # CHECK-NEXT: rdhwr $5, $hwr_synci_step
23 # CHECK-NEXT: .set pop # encoding: [0x7c,0x05,0x08,0x3b]
26 # CHECK-NEXT: .set mips32r
[all...] |
| /external/llvm/test/tools/llvm-readobj/ARM/ |
| attribute-2.s | 7 @CHECK-OBJ-NEXT: Value: 2
8 @CHECK-OBJ-NEXT: TagName: CPU_arch
9 @CHECK-OBJ-NEXT: Description: ARM v4T
14 @CHECK-OBJ-NEXT: Value: 2
15 @CHECK-OBJ-NEXT: TagName: THUMB_ISA_use
16 @CHECK-OBJ-NEXT: Description: Thumb-2
21 @CHECK-OBJ-NEXT: Value: 2
22 @CHECK-OBJ-NEXT: TagName: FP_arch
23 @CHECK-OBJ-NEXT: Description: VFPv2
28 @CHECK-OBJ-NEXT: Value:
[all...] |
| attribute-4.s | 7 @CHECK-OBJ-NEXT: Value: 4
8 @CHECK-OBJ-NEXT: TagName: CPU_arch
9 @CHECK-OBJ-NEXT: Description: ARM v5TE
14 @CHECK-OBJ-NEXT: Value: 4
15 @CHECK-OBJ-NEXT: TagName: FP_arch
16 @CHECK-OBJ-NEXT: Description: VFPv3-D16
21 @CHECK-OBJ-NEXT: Value: 4
22 @CHECK-OBJ-NEXT: TagName: Advanced_SIMD_arch
23 @CHECK-OBJ-NEXT: Description: ARMv8.1-a NEON
28 @CHECK-OBJ-NEXT: Value:
[all...] |
| /external/swiftshader/third_party/LLVM/test/MC/ARM/ |
| elf-movt.s | 15 @ ASM-NEXT: movt r0, :upper16:(GOT-(.LPC0_2+8))
19 @ OBJ-NEXT: 'sh_type', 0x00000001
20 @ OBJ-NEXT: 'sh_flags', 0x00000006
21 @ OBJ-NEXT: 'sh_addr', 0x00000000
22 @ OBJ-NEXT: 'sh_offset', 0x00000034
23 @ OBJ-NEXT: 'sh_size', 0x00000008
24 @ OBJ-NEXT: 'sh_link', 0x00000000
25 @ OBJ-NEXT: 'sh_info', 0x00000000
26 @ OBJ-NEXT: 'sh_addralign', 0x00000004
27 @ OBJ-NEXT: 'sh_entsize', 0x0000000
[all...] |
