/device/linaro/bootloader/edk2/QuarkPlatformPkg/Library/PlatformPcieHelperLib/ |
SocUnit.c | 29 UINT32 NewValue;
34 NewValue = QNCPortIORead (QUARK_SC_PCIE_AFE_SB_PORT_ID, QUARK_PCIE_AFE_PCIE_RXPICTRL0_L0);
35 NewValue &= OCFGPIMIXLOAD_1_0_MASK;
36 QNCPortIOWrite (QUARK_SC_PCIE_AFE_SB_PORT_ID, QUARK_PCIE_AFE_PCIE_RXPICTRL0_L0, NewValue);
38 NewValue = QNCPortIORead (QUARK_SC_PCIE_AFE_SB_PORT_ID, QUARK_PCIE_AFE_PCIE_RXPICTRL0_L1);
39 NewValue &= OCFGPIMIXLOAD_1_0_MASK;
40 QNCPortIOWrite (QUARK_SC_PCIE_AFE_SB_PORT_ID, QUARK_PCIE_AFE_PCIE_RXPICTRL0_L1, NewValue);
56 UINT32 NewValue;
67 NewValue = QNCAltPortRead (QUARK_SCSS_SOC_UNIT_SB_PORT_ID, QUARK_SCSS_SOC_UNIT_SOCCLKEN_CONFIG);
68 NewValue |= SOCCLKEN_CONFIG_PHY_I_CMNRESET_L; [all...] |
/device/linaro/bootloader/edk2/QuarkPlatformPkg/Platform/Dxe/PlatformInit/ |
PlatformConfig.c | 234 UINT32 NewValue;
253 NewValue = QNCPortRead (QUARK_NC_MEMORY_MANAGER_SB_PORT_ID, QUARK_NC_MEMORY_MANAGER_ESRAMPGCTRL_BLOCK);
254 NewValue |= BLOCK_DISABLE_PG;
255 QNCPortWrite (QUARK_NC_MEMORY_MANAGER_SB_PORT_ID, QUARK_NC_MEMORY_MANAGER_ESRAMPGCTRL_BLOCK, NewValue);
262 NewValue = (UINT32)(BaseAddress + SmramLength);
263 DEBUG ((EFI_D_INFO,"Locking HMBOUND at: = 0x%8x\n",NewValue));
264 QNCPortWrite (QUARK_NC_HOST_BRIDGE_SB_PORT_ID, QUARK_NC_HOST_BRIDGE_HMBOUND_REG, (NewValue | HMBOUND_LOCK));
269 NewValue = QNCPortRead (QUARK_NC_MEMORY_MANAGER_SB_PORT_ID, QUARK_NC_MEMORY_MANAGER_IMR5+QUARK_NC_MEMORY_MANAGER_IMRXL);
270 NewValue |= IMR_LOCK;
271 QNCPortWrite (QUARK_NC_MEMORY_MANAGER_SB_PORT_ID, QUARK_NC_MEMORY_MANAGER_IMR5+QUARK_NC_MEMORY_MANAGER_IMRXL, NewValue);
[all...] |
/device/linaro/bootloader/edk2/MdeModulePkg/Core/RuntimeDxe/ |
Crc32.c | 78 UINT32 NewValue;
80 NewValue = 0;
83 NewValue = NewValue | (1 << (31 - Index));
87 return NewValue;
|
/external/llvm/include/llvm/Support/ |
SaveAndRestore.h | 24 SaveAndRestore(T &X, const T &NewValue) : X(X), OldValue(X) { 25 X = NewValue;
|
/external/llvm/lib/Transforms/ObjCARC/ |
PtrState.h | 120 void SetKnownSafe(const bool NewValue) { RRI.KnownSafe = NewValue; } 124 void SetTailCallRelease(const bool NewValue) { 125 RRI.IsTailCallRelease = NewValue; 134 void SetReleaseMetadata(MDNode *NewValue) { RRI.ReleaseMetadata = NewValue; } 138 void SetCFGHazardAfflicted(const bool NewValue) { 139 RRI.CFGHazardAfflicted = NewValue;
|
/prebuilts/clang/host/darwin-x86/clang-4053586/prebuilt_include/llvm/include/llvm/Support/ |
SaveAndRestore.h | 24 SaveAndRestore(T &X, const T &NewValue) : X(X), OldValue(X) { 25 X = NewValue;
|
/prebuilts/clang/host/darwin-x86/clang-4393122/include/llvm/Support/ |
SaveAndRestore.h | 24 SaveAndRestore(T &X, const T &NewValue) : X(X), OldValue(X) { 25 X = NewValue;
|
/prebuilts/clang/host/darwin-x86/clang-4479392/include/llvm/Support/ |
SaveAndRestore.h | 24 SaveAndRestore(T &X, const T &NewValue) : X(X), OldValue(X) { 25 X = NewValue;
|
/prebuilts/clang/host/darwin-x86/clang-4579689/include/llvm/Support/ |
SaveAndRestore.h | 24 SaveAndRestore(T &X, const T &NewValue) : X(X), OldValue(X) { 25 X = NewValue;
|
/prebuilts/clang/host/darwin-x86/clang-4630689/include/llvm/Support/ |
SaveAndRestore.h | 24 SaveAndRestore(T &X, const T &NewValue) : X(X), OldValue(X) { 25 X = NewValue;
|
/prebuilts/clang/host/darwin-x86/clang-4639204/include/llvm/Support/ |
SaveAndRestore.h | 24 SaveAndRestore(T &X, const T &NewValue) : X(X), OldValue(X) { 25 X = NewValue;
|
/prebuilts/clang/host/darwin-x86/clang-4691093/include/llvm/Support/ |
SaveAndRestore.h | 24 SaveAndRestore(T &X, const T &NewValue) : X(X), OldValue(X) { 25 X = NewValue;
|
/prebuilts/clang/host/linux-x86/clang-4053586/prebuilt_include/llvm/include/llvm/Support/ |
SaveAndRestore.h | 24 SaveAndRestore(T &X, const T &NewValue) : X(X), OldValue(X) { 25 X = NewValue;
|
/prebuilts/clang/host/linux-x86/clang-4393122/include/llvm/Support/ |
SaveAndRestore.h | 24 SaveAndRestore(T &X, const T &NewValue) : X(X), OldValue(X) { 25 X = NewValue;
|
/prebuilts/clang/host/linux-x86/clang-4479392/include/llvm/Support/ |
SaveAndRestore.h | 24 SaveAndRestore(T &X, const T &NewValue) : X(X), OldValue(X) { 25 X = NewValue;
|
/prebuilts/clang/host/linux-x86/clang-4579689/include/llvm/Support/ |
SaveAndRestore.h | 24 SaveAndRestore(T &X, const T &NewValue) : X(X), OldValue(X) { 25 X = NewValue;
|
/prebuilts/clang/host/linux-x86/clang-4630689/include/llvm/Support/ |
SaveAndRestore.h | 24 SaveAndRestore(T &X, const T &NewValue) : X(X), OldValue(X) { 25 X = NewValue;
|
/prebuilts/clang/host/linux-x86/clang-4639204/include/llvm/Support/ |
SaveAndRestore.h | 24 SaveAndRestore(T &X, const T &NewValue) : X(X), OldValue(X) { 25 X = NewValue;
|
/prebuilts/clang/host/linux-x86/clang-4691093/include/llvm/Support/ |
SaveAndRestore.h | 24 SaveAndRestore(T &X, const T &NewValue) : X(X), OldValue(X) { 25 X = NewValue;
|
/device/linaro/bootloader/edk2/IntelFrameworkModulePkg/Bus/Pci/IdeBusDxe/ |
DriverConfiguration.c | 128 UINT8 NewValue;
150 NewValue = 0;
160 NewValue = (UINT8) (NewValue | (1 << Index));
164 if (EFI_ERROR (Status) || (NewValue != Value)) {
169 sizeof (NewValue),
170 &NewValue
|
/device/linaro/bootloader/edk2/QuarkSocPkg/QuarkNorthCluster/Smm/Dxe/SmmControlDxe/ |
SmmControlDriver.c | 176 UINT32 NewValue;
202 NewValue = QNCPortRead (QUARK_NC_HOST_BRIDGE_SB_PORT_ID, QNC_MSG_FSBIC_REG_HMISC);
203 NewValue |= SMI_EN;
204 QNCPortWrite (QUARK_NC_HOST_BRIDGE_SB_PORT_ID, QNC_MSG_FSBIC_REG_HMISC, NewValue);
274 UINT32 NewValue;
317 NewValue = QNCPortRead (QUARK_NC_HOST_BRIDGE_SB_PORT_ID, QNC_MSG_FSBIC_REG_HMISC);
318 NewValue |= SMI_EN;
319 QNCPortWrite (QUARK_NC_HOST_BRIDGE_SB_PORT_ID, QNC_MSG_FSBIC_REG_HMISC, NewValue);
|
/device/linaro/bootloader/edk2/QuarkPlatformPkg/Acpi/Dxe/BootScriptExecutorDxe/ |
ScriptExecute.c | 334 UINT32 NewValue;
350 NewValue = QNCPortRead (QUARK_NC_MEMORY_MANAGER_SB_PORT_ID, QUARK_NC_MEMORY_MANAGER_ESRAMPGCTRL_BLOCK);
351 NewValue |= BLOCK_DISABLE_PG;
352 QNCPortWrite (QUARK_NC_MEMORY_MANAGER_SB_PORT_ID, QUARK_NC_MEMORY_MANAGER_ESRAMPGCTRL_BLOCK, NewValue);
359 NewValue = (UINT32)(BaseAddress + SmramLength);
360 DEBUG ((EFI_D_INFO,"Locking HMBOUND at: = 0x%8x\n",NewValue));
361 QNCPortWrite (QUARK_NC_HOST_BRIDGE_SB_PORT_ID, QUARK_NC_HOST_BRIDGE_HMBOUND_REG, (NewValue | HMBOUND_LOCK));
367 NewValue = QNCPortRead (QUARK_NC_MEMORY_MANAGER_SB_PORT_ID, Index);
368 NewValue |= IMR_LOCK;
369 QNCPortWrite (QUARK_NC_MEMORY_MANAGER_SB_PORT_ID, Index, NewValue);
[all...] |
/device/linaro/bootloader/edk2/QuarkPlatformPkg/Platform/Pei/PlatformInit/ |
PlatformEarlyInit.c | 907 UINT32 NewValue;
918 NewValue = 0x0;
922 NewValue = (IoRead32 (GpioBaseAddress + R_QNC_GPIO_CGEN_CORE_WELL) & 0xFFFFFFFC) | LegacyGpioConfig->CoreWellEnable;
923 IoWrite32 (GpioBaseAddress + R_QNC_GPIO_CGEN_CORE_WELL, NewValue );
924 NewValue = (IoRead32 (GpioBaseAddress + R_QNC_GPIO_CGIO_CORE_WELL) & 0xFFFFFFFC) | LegacyGpioConfig->CoreWellIoSelect;
925 IoWrite32 (GpioBaseAddress + R_QNC_GPIO_CGIO_CORE_WELL, NewValue);
926 NewValue = (IoRead32 (GpioBaseAddress + R_QNC_GPIO_CGLVL_CORE_WELL) & 0xFFFFFFFC) | LegacyGpioConfig->CoreWellLvlForInputOrOutput;
927 IoWrite32 (GpioBaseAddress + R_QNC_GPIO_CGLVL_CORE_WELL, NewValue);
928 NewValue = (IoRead32 (GpioBaseAddress + R_QNC_GPIO_CGTPE_CORE_WELL) & 0xFFFFFFFC) | LegacyGpioConfig->CoreWellTriggerPositiveEdge;
929 IoWrite32 (GpioBaseAddress + R_QNC_GPIO_CGTPE_CORE_WELL, NewValue );
[all...] |
/device/linaro/bootloader/edk2/QuarkSocPkg/QuarkNorthCluster/Library/QNCSmmLib/ |
QNCSmmLib.c | 41 UINT32 NewValue;
57 NewValue = QNCPortRead (QUARK_NC_HOST_BRIDGE_SB_PORT_ID, QNC_MSG_FSBIC_REG_HMISC);
58 NewValue |= SMI_EN;
59 QNCPortWrite (QUARK_NC_HOST_BRIDGE_SB_PORT_ID, QNC_MSG_FSBIC_REG_HMISC, NewValue);
|
/device/linaro/bootloader/edk2/QuarkSocPkg/QuarkNorthCluster/Smm/Pei/SmmControlPei/ |
SmmControlPei.c | 147 UINT32 NewValue;
162 NewValue = QNCPortRead (QUARK_NC_HOST_BRIDGE_SB_PORT_ID, QNC_MSG_FSBIC_REG_HMISC);
163 NewValue |= SMI_EN;
164 QNCPortWrite (QUARK_NC_HOST_BRIDGE_SB_PORT_ID, QNC_MSG_FSBIC_REG_HMISC, NewValue);
|