| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/arm/ |
| armv8_2-a.s | 11 .macro test_sysreg Opc1 CRn CRm Opc2 rw
12 mrc p15, \Opc1,\() r0, \CRn\(), \CRm\(), \Opc2\()
14 mcr p15, \Opc1\(), r1, \CRn\(), \CRm\(), \Opc2\()
|
| /external/llvm/lib/Target/PowerPC/ |
| PPCTLSDynamicCall.cpp | 75 unsigned Opc1, Opc2;
82 Opc1 = PPC::ADDItlsgdL;
86 Opc1 = PPC::ADDItlsldL;
90 Opc1 = PPC::ADDItlsgdL32;
94 Opc1 = PPC::ADDItlsldL32;
105 MachineInstr *Addi = BuildMI(MBB, I, DL, TII->get(Opc1), GPR3)
|
| PPCISelDAGToDAG.cpp | [all...] |
| /external/llvm/lib/Target/Mips/ |
| Mips16ISelLowering.h | 56 MachineBasicBlock *emitSeliT16(unsigned Opc1, unsigned Opc2,
60 MachineBasicBlock *emitSelT16(unsigned Opc1, unsigned Opc2,
|
| Mips16ISelLowering.cpp | 584 Mips16TargetLowering::emitSelT16(unsigned Opc1, unsigned Opc2, MachineInstr &MI,
622 BuildMI(BB, DL, TII->get(Opc1)).addMBB(sinkMBB);
649 Mips16TargetLowering::emitSeliT16(unsigned Opc1, unsigned Opc2,
688 BuildMI(BB, DL, TII->get(Opc1)).addMBB(sinkMBB);
|
| /external/swiftshader/third_party/LLVM/include/llvm/Support/ |
| PatternMatch.h | 401 template<typename LHS_t, typename RHS_t, unsigned Opc1, unsigned Opc2>
410 if (V->getValueID() == Value::InstructionVal + Opc1 ||
416 return (CE->getOpcode() == Opc1 || CE->getOpcode() == Opc2) &&
|
| /external/llvm/lib/Target/AMDGPU/ |
| SIInstrInfo.cpp | 55 unsigned Opc1 = N1->getMachineOpcode();
58 int Op1Idx = AMDGPU::getNamedOperandIdx(Opc1, OpName);
100 unsigned Opc1 = Load1->getMachineOpcode();
103 if (!get(Opc0).mayLoad() || !get(Opc1).mayLoad())
106 if (isDS(Opc0) && isDS(Opc1)) {
124 AMDGPU::getNamedOperandIdx(Opc1, AMDGPU::OpName::data1) != -1)
132 if (isSMRD(Opc0) && isSMRD(Opc1)) {
157 if ((isMUBUF(Opc0) || isMTBUF(Opc0)) && (isMUBUF(Opc1) || isMTBUF(Opc1))) {
167 int OffIdx1 = AMDGPU::getNamedOperandIdx(Opc1, AMDGPU::OpName::offset)
[all...] |
| /external/llvm/include/llvm/IR/ |
| PatternMatch.h | 635 template <typename LHS_t, typename RHS_t, unsigned Opc1, unsigned Opc2>
643 if (V->getValueID() == Value::InstructionVal + Opc1 ||
649 return (CE->getOpcode() == Opc1 || CE->getOpcode() == Opc2) &&
[all...] |
| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| ARMCodeEmitter.cpp | [all...] |
| /prebuilts/clang/host/darwin-x86/clang-4053586/prebuilt_include/llvm/include/llvm/IR/ |
| PatternMatch.h | 648 template <typename LHS_t, typename RHS_t, unsigned Opc1, unsigned Opc2>
656 if (V->getValueID() == Value::InstructionVal + Opc1 ||
662 return (CE->getOpcode() == Opc1 || CE->getOpcode() == Opc2) &&
[all...] |
| /prebuilts/clang/host/darwin-x86/clang-4393122/include/llvm/IR/ |
| PatternMatch.h | 665 template <typename LHS_t, typename RHS_t, unsigned Opc1, unsigned Opc2>
673 if (V->getValueID() == Value::InstructionVal + Opc1 ||
679 return (CE->getOpcode() == Opc1 || CE->getOpcode() == Opc2) &&
[all...] |
| /prebuilts/clang/host/darwin-x86/clang-4479392/include/llvm/IR/ |
| PatternMatch.h | 665 template <typename LHS_t, typename RHS_t, unsigned Opc1, unsigned Opc2>
673 if (V->getValueID() == Value::InstructionVal + Opc1 ||
679 return (CE->getOpcode() == Opc1 || CE->getOpcode() == Opc2) &&
[all...] |
| /prebuilts/clang/host/linux-x86/clang-4053586/prebuilt_include/llvm/include/llvm/IR/ |
| PatternMatch.h | 648 template <typename LHS_t, typename RHS_t, unsigned Opc1, unsigned Opc2>
656 if (V->getValueID() == Value::InstructionVal + Opc1 ||
662 return (CE->getOpcode() == Opc1 || CE->getOpcode() == Opc2) &&
[all...] |
| /prebuilts/clang/host/linux-x86/clang-4393122/include/llvm/IR/ |
| PatternMatch.h | 665 template <typename LHS_t, typename RHS_t, unsigned Opc1, unsigned Opc2>
673 if (V->getValueID() == Value::InstructionVal + Opc1 ||
679 return (CE->getOpcode() == Opc1 || CE->getOpcode() == Opc2) &&
[all...] |
| /prebuilts/clang/host/linux-x86/clang-4479392/include/llvm/IR/ |
| PatternMatch.h | 665 template <typename LHS_t, typename RHS_t, unsigned Opc1, unsigned Opc2>
673 if (V->getValueID() == Value::InstructionVal + Opc1 ||
679 return (CE->getOpcode() == Opc1 || CE->getOpcode() == Opc2) &&
[all...] |
| /external/swiftshader/third_party/LLVM/lib/Target/X86/ |
| X86InstrInfo.cpp | [all...] |
| /external/llvm/lib/Target/X86/ |
| X86InstrInfo.cpp | [all...] |
| X86ISelLowering.cpp | [all...] |
| X86IntrinsicsInfo.h | 46 uint16_t Opc1;
[all...] |
| /external/llvm/lib/Target/AArch64/ |
| AArch64FastISel.cpp | 375 unsigned Opc1 = Is64Bit ? AArch64::MOVi64imm : AArch64::MOVi32imm;
380 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(Opc1), TmpReg)
[all...] |
| /external/clang/lib/CodeGen/ |
| CGBuiltin.cpp | [all...] |
