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    Searched refs:PEBS (Results 1 - 11 of 11) sorted by null

  /device/linaro/bootloader/edk2/Vlv2DeviceRefCodePkg/AcpiTablesPCAT/
token.asl 35 Name(PEBS, 0xe0000000) // PCIe Base
  /device/linaro/bootloader/edk2/UefiCpuPkg/Include/Register/Msr/
PentiumMMsr.h 428 /// Processor does not support processor event based sampling (PEBS); 0 =
429 /// PEBS is supported. The Pentium M processor does not support PEBS.
431 UINT32 PEBS:1;
SilvermontMsr.h 649 UINT32 PEBS:1;
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AtomMsr.h 532 UINT32 PEBS:1;
657 (PEBS).".
685 /// [Bit 0] Enable PEBS on IA32_PMC0. (R/W).
Core2Msr.h 695 UINT32 PEBS:1;
918 /// [Bit 6] PEBS Record Format.
1017 (PEBS).".
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XeonPhiMsr.h 408 UINT32 PEBS:1;
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Pentium4Msr.h 932 /// event-based sampling (PEBS); when clear, PEBS is supported.
934 UINT32 PEBS:1;
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GoldmontMsr.h 343 UINT32 PEBS:1;
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NehalemMsr.h 400 UINT32 PEBS:1;
1037 Thread. See Section 18.8.1.1, "Processor Event Based Sampling (PEBS).".
1065 /// [Bit 0] Enable PEBS on IA32_PMC0. (R/W).
1069 /// [Bit 1] Enable PEBS on IA32_PMC1. (R/W).
1073 /// [Bit 2] Enable PEBS on IA32_PMC2. (R/W).
1077 /// [Bit 3] Enable PEBS on IA32_PMC3. (R/W).
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SandyBridgeMsr.h 514 UINT32 PEBS:1;
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  /device/linaro/bootloader/edk2/UefiCpuPkg/Include/Register/
ArchitecturalMsr.h     [all...]

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