HomeSort by relevance Sort by last modified time
    Searched refs:PLL_SLOW_MODE (Results 1 - 8 of 8) sorted by null

  /device/linaro/bootloader/arm-trusted-firmware/plat/rockchip/rk3399/include/shared/
misc_regs.h 19 #define PLL_SLOW_MODE 0
  /device/linaro/bootloader/arm-trusted-firmware/plat/rockchip/rk3399/drivers/m0/src/
dram.c 43 mmio_write_32(CRU_BASE + CRU_DPLL_CON3, PLL_MODE(PLL_SLOW_MODE));
  /device/linaro/bootloader/arm-trusted-firmware/plat/rockchip/rk3399/drivers/soc/
soc.c 49 mmio_write_32(PMUCRU_BASE + PMUCRU_PPLL_CON(3), PLL_SLOW_MODE);
52 CRU_PLL_CON(pll_id, 3)), PLL_SLOW_MODE);
119 mmio_write_32((CRU_BASE + CRU_PLL_CON(pll_id, 3)), PLL_SLOW_MODE);
soc.h 35 #define PLL_SLOW_MODE BITS_WITH_WMASK(SLOW_MODE,\
  /device/linaro/bootloader/arm-trusted-firmware/plat/rockchip/rk3328/drivers/pmu/
pmu.c 192 mmio_write_32(CRU_BASE + CRU_CRU_MODE, PLL_SLOW_MODE(CPLL_ID));
193 mmio_write_32(CRU_BASE + CRU_CRU_MODE, PLL_SLOW_MODE(GPLL_ID));
194 mmio_write_32(CRU_BASE + CRU_CRU_MODE, PLL_SLOW_MODE(NPLL_ID));
195 mmio_write_32(CRU_BASE + CRU_CRU_MODE, PLL_SLOW_MODE(APLL_ID));
298 mmio_write_32(CRU_BASE + CRU_CRU_MODE, PLL_SLOW_MODE(DPLL_ID));
342 mmio_write_32(CRU_BASE + CRU_CRU_MODE, PLL_SLOW_MODE(pll_id));
  /device/linaro/bootloader/arm-trusted-firmware/plat/rockchip/rk3328/drivers/soc/
soc.h 56 #define PLL_SLOW_MODE(id) ((id) == NPLL_ID) ? \
  /device/linaro/bootloader/arm-trusted-firmware/plat/rockchip/rk3399/drivers/dram/
suspend.c 644 mmio_write_32((CRU_BASE + CRU_PLL_CON(pll_id, 3)), PLL_SLOW_MODE);
  /device/linaro/bootloader/arm-trusted-firmware/plat/rockchip/rk3399/drivers/pmu/
pmu.c 557 PLL_SLOW_MODE);
    [all...]

Completed in 828 milliseconds