| /prebuilts/go/darwin-x86/src/reflect/ |
| asm_arm64.s | 14 MOVD R26, 8(RSP)
26 MOVD R26, 8(RSP)
|
| /prebuilts/go/linux-x86/src/reflect/ |
| asm_arm64.s | 14 MOVD R26, 8(RSP)
26 MOVD R26, 8(RSP)
|
| /prebuilts/go/darwin-x86/src/cmd/asm/internal/asm/testdata/ |
| arm64enc.s | 34 ANDW R9@>7, R19, R26 // 7a1ec90a
35 AND R9@>7, R19, R26 // 7a1ec98a
39 ANDSW R26->24, R21, R15 // af629a6a
40 ANDS R30@>44, R3, R26 // 7ab0deea
66 CCMNW AL, R26, $20, $11 // 4beb543a
103 //TODO CMP R25.SXTH<<5, R26 // 5fb739eb
124 CSINCW LE, R5, R24, R26 // bad4981a
125 CSINC VS, R26, R16, R17 // 5167909a
190 //TODO MOVBW R26(R0), R21 // 1568fa38
224 LDXRH (R12), R26 // 9a7d5f4
[all...] |
| /prebuilts/go/linux-x86/src/cmd/asm/internal/asm/testdata/ |
| arm64enc.s | 34 ANDW R9@>7, R19, R26 // 7a1ec90a
35 AND R9@>7, R19, R26 // 7a1ec98a
39 ANDSW R26->24, R21, R15 // af629a6a
40 ANDS R30@>44, R3, R26 // 7ab0deea
66 CCMNW AL, R26, $20, $11 // 4beb543a
103 //TODO CMP R25.SXTH<<5, R26 // 5fb739eb
124 CSINCW LE, R5, R24, R26 // bad4981a
125 CSINC VS, R26, R16, R17 // 5167909a
190 //TODO MOVBW R26(R0), R21 // 1568fa38
224 LDXRH (R12), R26 // 9a7d5f4
[all...] |
| /external/swiftshader/third_party/LLVM/lib/Target/Alpha/MCTargetDesc/ |
| AlphaMCTargetDesc.cpp | 42 InitAlphaMCRegisterInfo(X, Alpha::R26);
|
| /prebuilts/go/darwin-x86/src/runtime/cgo/ |
| asm_arm64.s | 29 MOVD R26, (8*11)(RSP)
59 MOVD (8*11)(RSP), R26
|
| asm_ppc64x.s | 63 MOVD R26, -192(R1)
104 MOVD -192(R1), R26
|
| /prebuilts/go/linux-x86/src/runtime/cgo/ |
| asm_arm64.s | 29 MOVD R26, (8*11)(RSP)
59 MOVD (8*11)(RSP), R26
|
| asm_ppc64x.s | 63 MOVD R26, -192(R1)
104 MOVD -192(R1), R26
|
| /prebuilts/go/darwin-x86/src/runtime/ |
| rt0_darwin_arm64.s | 28 MOVD R26, 80(RSP)
60 MOVD 80(RSP), R26
|
| rt0_linux_arm64.s | 23 MOVD R26, 80(RSP)
67 MOVD 80(RSP), R26
|
| asm_arm64.s | 133 MOVD gobuf_ctxt(R5), R26
162 MOVD fn+0(FP), R26 // context
163 MOVD 0(R26), R4 // code pointer
185 MOVD R3, R26 // context
228 MOVD 0(R26), R3 // code pointer
244 MOVD 0(R26), R3 // code pointer
282 MOVD R26, (g_sched+gobuf_ctxt)(g)
304 MOVW $0, R26
381 MOVD f+8(FP), R26; \
382 MOVD (R26), R0;
[all...] |
| rt0_linux_ppc64le.s | 29 MOVD R26, 120(R1)
98 MOVD 120(R1), R26
|
| /prebuilts/go/linux-x86/src/runtime/ |
| rt0_darwin_arm64.s | 28 MOVD R26, 80(RSP)
60 MOVD 80(RSP), R26
|
| rt0_linux_arm64.s | 23 MOVD R26, 80(RSP)
67 MOVD 80(RSP), R26
|
| asm_arm64.s | 133 MOVD gobuf_ctxt(R5), R26
162 MOVD fn+0(FP), R26 // context
163 MOVD 0(R26), R4 // code pointer
185 MOVD R3, R26 // context
228 MOVD 0(R26), R3 // code pointer
244 MOVD 0(R26), R3 // code pointer
282 MOVD R26, (g_sched+gobuf_ctxt)(g)
304 MOVW $0, R26
381 MOVD f+8(FP), R26; \
382 MOVD (R26), R0;
[all...] |
| /external/llvm/lib/Target/Lanai/MCTargetDesc/ |
| LanaiBaseInfo.h | 102 case Lanai::R26:
|
| /prebuilts/go/darwin-x86/src/cmd/compile/internal/ssa/ |
| opGen.go | [all...] |
| /prebuilts/go/linux-x86/src/cmd/compile/internal/ssa/ |
| opGen.go | [all...] |
| /external/swiftshader/third_party/LLVM/lib/Target/PowerPC/MCTargetDesc/ |
| PPCBaseInfo.h | 57 case R26: case X26: case F26: case V26: case CR6EQ: return 26;
|
| /external/llvm/lib/Target/Hexagon/ |
| HexagonRegisterInfo.cpp | 109 Hexagon::R24, Hexagon::R25, Hexagon::R26, Hexagon::R27, 0
118 Hexagon::R24, Hexagon::R25, Hexagon::R26, Hexagon::R27, 0
|
| /external/swiftshader/third_party/LLVM/lib/Target/MBlaze/MCTargetDesc/ |
| MBlazeBaseInfo.h | 131 case MBlaze::R26 : return 26;
196 case 26 : return MBlaze::R26;
|
| /external/swiftshader/third_party/LLVM/lib/Target/PowerPC/ |
| PPCFrameLowering.h | 159 {PPC::R26, -24},
238 {PPC::R26, -44},
|
| /prebuilts/go/darwin-x86/src/hash/crc32/ |
| crc32_ppc64le.s | 95 MOVWZ 0(R24),R26 // tab[5][crc>>16&0xFF]
96 XOR R21,R26,R21 // xor done R26
101 MOVBZ R7,R26 // crc&0xFF
104 SLD $2,R26,R26 // crc&0xFF*2
106 ADD R26,R10,R26 // &tab[7][crc&0xFF]
108 MOVWZ 0(R26),R28 // tab[7][crc&0xFF]
|
| /prebuilts/go/linux-x86/src/hash/crc32/ |
| crc32_ppc64le.s | 95 MOVWZ 0(R24),R26 // tab[5][crc>>16&0xFF]
96 XOR R21,R26,R21 // xor done R26
101 MOVBZ R7,R26 // crc&0xFF
104 SLD $2,R26,R26 // crc&0xFF*2
106 ADD R26,R10,R26 // &tab[7][crc&0xFF]
108 MOVWZ 0(R26),R28 // tab[7][crc&0xFF]
|
