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    Searched refs:R_PCH_EHCI_PWR_CNTL_STS (Results 1 - 2 of 2) sorted by null

  /device/linaro/bootloader/edk2/Vlv2DeviceRefCodePkg/ValleyView2Soc/SouthCluster/Include/PchRegs/
PchRegsUsb.h 67 #define R_PCH_EHCI_PWR_CNTL_STS 0x54 // Power Management Control / Status
  /device/linaro/bootloader/edk2/Vlv2TbltDevicePkg/PlatformDxe/
Platform.c 546 R_PCH_EHCI_PWR_CNTL_STS,
561 Buffer32 = MmioRead32(EhciPciMmBase + R_PCH_EHCI_PWR_CNTL_STS);
562 DEBUG ((EFI_D_INFO, "ConfigureAdditionalPm() R_PCH_EHCI_PWR_CNTL_STS = 0x%x \n",Buffer32));
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