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  /external/llvm/include/llvm/CodeGen/GlobalISel/
RegisterBank.h 95 inline raw_ostream &operator<<(raw_ostream &OS, const RegisterBank &RegBank) {
96 RegBank.print(OS);
RegisterBankInfo.h 54 const RegisterBank *RegBank;
60 const RegisterBank &RegBank)
61 : StartIdx(StartIdx), Length(Length), RegBank(&RegBank) {}
73 /// Check that the Mask is compatible with the RegBank.
74 /// Indeed, if the RegBank cannot accomadate the "active bits" of the mask,
166 /// This element will map to \p RegBank and fully define a mask, whose
169 const RegisterBank &RegBank);
363 /// Record \p RegBank as the register bank that covers \p SVT.
368 /// getRegBankForType(SVT) == &RegBank
    [all...]
  /prebuilts/clang/host/darwin-x86/clang-4053586/prebuilt_include/llvm/include/llvm/CodeGen/GlobalISel/
RegisterBank.h 93 inline raw_ostream &operator<<(raw_ostream &OS, const RegisterBank &RegBank) {
94 RegBank.print(OS);
RegisterBankInfo.h 56 const RegisterBank *RegBank;
62 const RegisterBank &RegBank)
63 : StartIdx(StartIdx), Length(Length), RegBank(&RegBank) {}
75 /// Check that the Mask is compatible with the RegBank.
76 /// Indeed, if the RegBank cannot accomadate the "active bits" of the mask,
433 const RegisterBank &RegBank) const;
441 const RegisterBank &RegBank) const;
538 /// \note The mapping RC -> RegBank could be built while adding the
  /prebuilts/clang/host/darwin-x86/clang-4393122/include/llvm/CodeGen/GlobalISel/
RegisterBank.h 93 inline raw_ostream &operator<<(raw_ostream &OS, const RegisterBank &RegBank) {
94 RegBank.print(OS);
RegisterBankInfo.h 56 const RegisterBank *RegBank;
62 const RegisterBank &RegBank)
63 : StartIdx(StartIdx), Length(Length), RegBank(&RegBank) {}
75 /// Check that the Mask is compatible with the RegBank.
76 /// Indeed, if the RegBank cannot accomadate the "active bits" of the mask,
441 const RegisterBank &RegBank) const;
449 const RegisterBank &RegBank) const;
573 /// \note The mapping RC -> RegBank could be built while adding the
  /prebuilts/clang/host/darwin-x86/clang-4479392/include/llvm/CodeGen/GlobalISel/
RegisterBank.h 93 inline raw_ostream &operator<<(raw_ostream &OS, const RegisterBank &RegBank) {
94 RegBank.print(OS);
RegisterBankInfo.h 56 const RegisterBank *RegBank;
62 const RegisterBank &RegBank)
63 : StartIdx(StartIdx), Length(Length), RegBank(&RegBank) {}
75 /// Check that the Mask is compatible with the RegBank.
76 /// Indeed, if the RegBank cannot accomadate the "active bits" of the mask,
441 const RegisterBank &RegBank) const;
449 const RegisterBank &RegBank) const;
573 /// \note The mapping RC -> RegBank could be built while adding the
  /prebuilts/clang/host/darwin-x86/clang-4579689/include/llvm/CodeGen/GlobalISel/
RegisterBank.h 93 inline raw_ostream &operator<<(raw_ostream &OS, const RegisterBank &RegBank) {
94 RegBank.print(OS);
RegisterBankInfo.h 59 const RegisterBank *RegBank;
65 const RegisterBank &RegBank)
66 : StartIdx(StartIdx), Length(Length), RegBank(&RegBank) {}
78 /// Check that the Mask is compatible with the RegBank.
79 /// Indeed, if the RegBank cannot accomadate the "active bits" of the mask,
461 const RegisterBank &RegBank) const;
469 const RegisterBank &RegBank) const;
593 /// \note The mapping RC -> RegBank could be built while adding the
  /prebuilts/clang/host/darwin-x86/clang-4630689/include/llvm/CodeGen/GlobalISel/
RegisterBank.h 93 inline raw_ostream &operator<<(raw_ostream &OS, const RegisterBank &RegBank) {
94 RegBank.print(OS);
RegisterBankInfo.h 59 const RegisterBank *RegBank;
65 const RegisterBank &RegBank)
66 : StartIdx(StartIdx), Length(Length), RegBank(&RegBank) {}
78 /// Check that the Mask is compatible with the RegBank.
79 /// Indeed, if the RegBank cannot accomadate the "active bits" of the mask,
461 const RegisterBank &RegBank) const;
469 const RegisterBank &RegBank) const;
593 /// \note The mapping RC -> RegBank could be built while adding the
  /prebuilts/clang/host/darwin-x86/clang-4639204/include/llvm/CodeGen/GlobalISel/
RegisterBank.h 93 inline raw_ostream &operator<<(raw_ostream &OS, const RegisterBank &RegBank) {
94 RegBank.print(OS);
RegisterBankInfo.h 59 const RegisterBank *RegBank;
65 const RegisterBank &RegBank)
66 : StartIdx(StartIdx), Length(Length), RegBank(&RegBank) {}
78 /// Check that the Mask is compatible with the RegBank.
79 /// Indeed, if the RegBank cannot accomadate the "active bits" of the mask,
461 const RegisterBank &RegBank) const;
469 const RegisterBank &RegBank) const;
593 /// \note The mapping RC -> RegBank could be built while adding the
  /prebuilts/clang/host/darwin-x86/clang-4691093/include/llvm/CodeGen/GlobalISel/
RegisterBank.h 93 inline raw_ostream &operator<<(raw_ostream &OS, const RegisterBank &RegBank) {
94 RegBank.print(OS);
RegisterBankInfo.h 59 const RegisterBank *RegBank;
65 const RegisterBank &RegBank)
66 : StartIdx(StartIdx), Length(Length), RegBank(&RegBank) {}
78 /// Check that the Mask is compatible with the RegBank.
79 /// Indeed, if the RegBank cannot accomadate the "active bits" of the mask,
461 const RegisterBank &RegBank) const;
469 const RegisterBank &RegBank) const;
593 /// \note The mapping RC -> RegBank could be built while adding the
  /prebuilts/clang/host/linux-x86/clang-4053586/prebuilt_include/llvm/include/llvm/CodeGen/GlobalISel/
RegisterBank.h 93 inline raw_ostream &operator<<(raw_ostream &OS, const RegisterBank &RegBank) {
94 RegBank.print(OS);
  /prebuilts/clang/host/linux-x86/clang-4393122/include/llvm/CodeGen/GlobalISel/
RegisterBank.h 93 inline raw_ostream &operator<<(raw_ostream &OS, const RegisterBank &RegBank) {
94 RegBank.print(OS);
  /prebuilts/clang/host/linux-x86/clang-4479392/include/llvm/CodeGen/GlobalISel/
RegisterBank.h 93 inline raw_ostream &operator<<(raw_ostream &OS, const RegisterBank &RegBank) {
94 RegBank.print(OS);
  /prebuilts/clang/host/linux-x86/clang-4579689/include/llvm/CodeGen/GlobalISel/
RegisterBank.h 93 inline raw_ostream &operator<<(raw_ostream &OS, const RegisterBank &RegBank) {
94 RegBank.print(OS);
  /prebuilts/clang/host/linux-x86/clang-4630689/include/llvm/CodeGen/GlobalISel/
RegisterBank.h 93 inline raw_ostream &operator<<(raw_ostream &OS, const RegisterBank &RegBank) {
94 RegBank.print(OS);
  /prebuilts/clang/host/linux-x86/clang-4639204/include/llvm/CodeGen/GlobalISel/
RegisterBank.h 93 inline raw_ostream &operator<<(raw_ostream &OS, const RegisterBank &RegBank) {
94 RegBank.print(OS);
  /prebuilts/clang/host/linux-x86/clang-4691093/include/llvm/CodeGen/GlobalISel/
RegisterBank.h 93 inline raw_ostream &operator<<(raw_ostream &OS, const RegisterBank &RegBank) {
94 RegBank.print(OS);
  /external/llvm/utils/TableGen/
RegisterInfoEmitter.cpp 77 void EmitRegUnitPressure(raw_ostream &OS, const CodeGenRegBank &RegBank,
79 void emitComposeSubRegIndices(raw_ostream &OS, CodeGenRegBank &RegBank,
81 void emitComposeSubRegIndexLaneMask(raw_ostream &OS, CodeGenRegBank &RegBank,
190 EmitRegUnitPressure(raw_ostream &OS, const CodeGenRegBank &RegBank,
192 unsigned NumRCs = RegBank.getRegClasses().size();
193 unsigned NumSets = RegBank.getNumRegPressureSets();
199 for (const auto &RC : RegBank.getRegClasses()) {
206 OS << " {" << (*Regs.begin())->getWeight(RegBank)
207 << ", " << RegBank.getRegUnitSetWeight(RegUnits);
218 for (unsigned UnitIdx = 0, UnitEnd = RegBank.getNumNativeRegUnits()
    [all...]
  /external/llvm/lib/CodeGen/GlobalISel/
RegisterBankInfo.cpp 48 const RegisterBank &RegBank = getRegBank(Idx);
49 assert(Idx == RegBank.getID() &&
51 dbgs() << "Verify " << RegBank << '\n';
52 assert(RegBank.verify(TRI) && "RegBank is invalid");
60 RegisterBank &RegBank = getRegBank(ID);
61 assert(RegBank.getID() == RegisterBank::InvalidID &&
63 RegBank.ID = ID;
64 RegBank.Name = Name;
195 const RegisterBank &RegBank = getRegBankFromRegClass(*RC)
    [all...]

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