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    Searched refs:ShImm (Results 1 - 11 of 11) sorted by null

  /external/llvm/lib/Target/ARM/
ARMBaseInstrInfo.cpp     [all...]
ARMISelDAGToDAG.cpp 173 SDValue &OffReg, SDValue &ShImm);
    [all...]
  /external/swiftshader/third_party/LLVM/lib/Target/ARM/InstPrinter/
ARMInstPrinter.cpp 299 if (unsigned ShImm = ARM_AM::getAM2Offset(MO3.getImm()))
302 << " #" << ShImm;
325 if (unsigned ShImm = ARM_AM::getAM2Offset(MO3.getImm()))
328 << " #" << ShImm;
383 if (unsigned ShImm = ARM_AM::getAM2Offset(MO2.getImm()))
386 << " #" << ShImm;
  /external/swiftshader/third_party/LLVM/lib/Target/ARM/
ARMISelDAGToDAG.cpp 181 SDValue &OffReg, SDValue &ShImm);
    [all...]
ARMBaseInstrInfo.cpp     [all...]
ARMCodeEmitter.cpp     [all...]
  /external/llvm/lib/Target/ARM/InstPrinter/
ARMInstPrinter.cpp 45 unsigned ShImm, bool UseMarkup) {
46 if (ShOpc == ARM_AM::no_shift || (ShOpc == ARM_AM::lsl && !ShImm))
50 assert(!(ShOpc == ARM_AM::ror && !ShImm) && "Cannot have ror #0");
57 O << "#" << translateShiftImm(ShImm);
    [all...]
  /external/llvm/lib/Target/ARM/MCTargetDesc/
ARMMCCodeEmitter.cpp     [all...]
  /external/swiftshader/third_party/LLVM/lib/Target/ARM/MCTargetDesc/
ARMMCCodeEmitter.cpp     [all...]
  /external/capstone/arch/ARM/
ARMInstPrinter.c 179 static void printRegImmShift(MCInst *MI, SStream *O, ARM_AM_ShiftOpc ShOpc, unsigned ShImm)
181 if (ShOpc == ARM_AM_no_shift || (ShOpc == ARM_AM_lsl && !ShImm))
185 //assert (!(ShOpc == ARM_AM_ror && !ShImm) && "Cannot have ror #0");
196 SStream_concat(O, "#%u", translateShiftImm(ShImm));
199 MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].shift.value = translateShiftImm(ShImm);
201 MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count - 1].shift.value = translateShiftImm(ShImm);
    [all...]
  /external/swiftshader/third_party/subzero/src/
IceAssemblerARM32.cpp 413 if (const auto *ShImm = llvm::dyn_cast<OperandARM32ShAmtImm>(Opnd)) {
414 const IValueT Immed5 = ShImm->getShAmtImm();
    [all...]

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