| /external/llvm/lib/Target/AArch64/ |
| AArch64InstrInfo.h | 158 ArrayRef<MachineOperand> Cond, unsigned TrueReg,
|
| AArch64InstrInfo.cpp | 368 unsigned TrueReg, unsigned FalseReg, int &CondCycles, int &TrueCycles,
373 RI.getCommonSubClass(MRI.getRegClass(TrueReg), MRI.getRegClass(FalseReg));
387 if (canFoldIntoCSel(MRI, TrueReg))
411 unsigned TrueReg, unsigned FalseReg) const {
514 unsigned FoldedOpc = canFoldIntoCSel(MRI, TrueReg, &NewVReg);
519 TrueReg = FalseReg;
533 MRI.constrainRegClass(TrueReg, RC);
537 BuildMI(MBB, I, DL, get(Opc), DstReg).addReg(TrueReg).addReg(FalseReg).addImm(
[all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCInstrInfo.h | 181 ArrayRef<MachineOperand> Cond, unsigned TrueReg,
|
| PPCInstrInfo.cpp | 687 unsigned TrueReg, unsigned FalseReg,
703 RI.getCommonSubClass(MRI.getRegClass(TrueReg), MRI.getRegClass(FalseReg));
728 ArrayRef<MachineOperand> Cond, unsigned TrueReg,
739 RI.getCommonSubClass(MRI.getRegClass(TrueReg), MRI.getRegClass(FalseReg));
740 assert(RC && "TrueReg and FalseReg must have overlapping register classes");
791 unsigned FirstReg = SwapOps ? FalseReg : TrueReg,
792 SecondReg = SwapOps ? TrueReg : FalseReg;
[all...] |
| /external/llvm/include/llvm/Target/ |
| TargetInstrInfo.h | 672 /// instruction that chooses between TrueReg and FalseReg based on the
675 /// When successful, also return the latency in cycles from TrueReg,
683 /// @param TrueReg Virtual register to select when Cond is true.
686 /// @param TrueCycles Latency from TrueReg to select output.
690 unsigned TrueReg, unsigned FalseReg,
696 /// Insert a select instruction into MBB before I that will copy TrueReg t
[all...] |
| /prebuilts/clang/host/darwin-x86/clang-4053586/prebuilt_include/llvm/include/llvm/Target/ |
| TargetInstrInfo.h | 678 /// instruction that chooses between TrueReg and FalseReg based on the
681 /// When successful, also return the latency in cycles from TrueReg,
689 /// @param TrueReg Virtual register to select when Cond is true.
692 /// @param TrueCycles Latency from TrueReg to select output.
696 unsigned TrueReg, unsigned FalseReg
[all...] |
| /prebuilts/clang/host/darwin-x86/clang-4393122/include/llvm/Target/ |
| TargetInstrInfo.h | [all...] |
| /prebuilts/clang/host/darwin-x86/clang-4479392/include/llvm/Target/ |
| TargetInstrInfo.h | [all...] |
| /prebuilts/clang/host/darwin-x86/clang-4579689/include/llvm/Target/ |
| TargetInstrInfo.h | [all...] |
| /prebuilts/clang/host/darwin-x86/clang-4630689/include/llvm/Target/ |
| TargetInstrInfo.h | [all...] |
| /prebuilts/clang/host/darwin-x86/clang-4639204/include/llvm/Target/ |
| TargetInstrInfo.h | [all...] |
| /prebuilts/clang/host/darwin-x86/clang-4691093/include/llvm/Target/ |
| TargetInstrInfo.h | [all...] |
| /prebuilts/clang/host/linux-x86/clang-4053586/prebuilt_include/llvm/include/llvm/Target/ |
| TargetInstrInfo.h | 678 /// instruction that chooses between TrueReg and FalseReg based on the
681 /// When successful, also return the latency in cycles from TrueReg,
689 /// @param TrueReg Virtual register to select when Cond is true.
692 /// @param TrueCycles Latency from TrueReg to select output.
696 unsigned TrueReg, unsigned FalseReg
[all...] |
| /prebuilts/clang/host/linux-x86/clang-4393122/include/llvm/Target/ |
| TargetInstrInfo.h | [all...] |
| /prebuilts/clang/host/linux-x86/clang-4479392/include/llvm/Target/ |
| TargetInstrInfo.h | [all...] |
| /prebuilts/clang/host/linux-x86/clang-4579689/include/llvm/Target/ |
| TargetInstrInfo.h | [all...] |
| /prebuilts/clang/host/linux-x86/clang-4630689/include/llvm/Target/ |
| TargetInstrInfo.h | [all...] |
| /prebuilts/clang/host/linux-x86/clang-4639204/include/llvm/Target/ |
| TargetInstrInfo.h | [all...] |
| /prebuilts/clang/host/linux-x86/clang-4691093/include/llvm/Target/ |
| TargetInstrInfo.h | [all...] |
| /external/llvm/lib/Target/WebAssembly/ |
| WebAssemblyFastISel.cpp | 724 unsigned TrueReg = getRegForValue(Select->getTrueValue());
725 if (TrueReg == 0)
733 std::swap(TrueReg, FalseReg);
763 .addReg(TrueReg)
[all...] |
| /external/llvm/lib/Target/X86/ |
| X86InstrInfo.h | 327 ArrayRef<MachineOperand> Cond, unsigned TrueReg,
|
| X86InstrInfo.cpp | [all...] |
| /external/llvm/lib/Target/SystemZ/ |
| SystemZISelLowering.cpp | [all...] |
