| /external/tensorflow/tensorflow/core/kernels/ |
| cwise_op_acos.cc | 19 REGISTER2(UnaryOp, CPU, "Acos", functor::acos, float, double);
22 REGISTER2(UnaryOp, GPU, "Acos", functor::acos, float, double);
26 REGISTER2(UnaryOp, SYCL, "Acos", functor::acos, float, double);
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| cwise_op_acosh.cc | 20 REGISTER4(UnaryOp, CPU, "Acosh", functor::acosh, float, double, complex64,
24 REGISTER2(UnaryOp, SYCL, "Acosh", functor::acosh, float, double);
28 REGISTER2(UnaryOp, GPU, "Acosh", functor::acosh, float, double);
|
| cwise_op_asin.cc | 19 REGISTER2(UnaryOp, CPU, "Asin", functor::asin, float, double);
22 REGISTER2(UnaryOp, GPU, "Asin", functor::asin, float, double);
26 REGISTER2(UnaryOp, SYCL, "Asin", functor::asin, float, double);
|
| cwise_op_asinh.cc | 20 REGISTER4(UnaryOp, CPU, "Asinh", functor::asinh, float, double, complex64,
24 REGISTER2(UnaryOp, SYCL, "Asinh", functor::asinh, float, double);
28 REGISTER2(UnaryOp, GPU, "Asinh", functor::asinh, float, double);
|
| cwise_op_atan.cc | 19 REGISTER2(UnaryOp, CPU, "Atan", functor::atan, float, double);
22 REGISTER2(UnaryOp, GPU, "Atan", functor::atan, float, double);
26 REGISTER2(UnaryOp, SYCL, "Atan", functor::atan, float, double);
|
| cwise_op_atanh.cc | 20 REGISTER4(UnaryOp, CPU, "Atanh", functor::atanh, float, double, complex64,
24 REGISTER2(UnaryOp, SYCL, "Atanh", functor::atanh, float, double);
28 REGISTER2(UnaryOp, GPU, "Atanh", functor::atanh, float, double);
|
| cwise_op_tan.cc | 19 REGISTER2(UnaryOp, CPU, "Tan", functor::tan, float, double);
22 REGISTER2(UnaryOp, GPU, "Tan", functor::tan, float, double);
26 REGISTER2(UnaryOp, SYCL, "Tan", functor::tan, float, double);
|
| cwise_op_rint.cc | 19 REGISTER2(UnaryOp, CPU, "Rint", functor::rint, float, double);
21 REGISTER2(UnaryOp, GPU, "Rint", functor::rint, float, double);
|
| cwise_op_digamma.cc | 19 REGISTER3(UnaryOp, CPU, "Digamma", functor::digamma, float, Eigen::half,
22 REGISTER3(UnaryOp, GPU, "Digamma", functor::digamma, float, Eigen::half,
|
| cwise_op_erf.cc | 19 REGISTER3(UnaryOp, CPU, "Erf", functor::erf, float, Eigen::half, double);
21 REGISTER3(UnaryOp, GPU, "Erf", functor::erf, float, Eigen::half, double);
|
| cwise_op_erfc.cc | 19 REGISTER3(UnaryOp, CPU, "Erfc", functor::erfc, float, Eigen::half, double);
21 REGISTER3(UnaryOp, GPU, "Erfc", functor::erfc, float, Eigen::half, double);
|
| cwise_op_lgamma.cc | 19 REGISTER3(UnaryOp, CPU, "Lgamma", functor::lgamma, float, Eigen::half, double);
21 REGISTER3(UnaryOp, GPU, "Lgamma", functor::lgamma, float, Eigen::half, double);
|
| cwise_op_logical_not.cc | 20 UnaryOp<CPUDevice, functor::logical_not>);
23 UnaryOp<GPUDevice, functor::logical_not>);
|
| cwise_op_ceil.cc | 19 REGISTER3(UnaryOp, CPU, "Ceil", functor::ceil, float, Eigen::half, double);
22 REGISTER3(UnaryOp, GPU, "Ceil", functor::ceil, float, Eigen::half, double);
26 REGISTER2(UnaryOp, SYCL, "Ceil", functor::ceil, float, double);
|
| cwise_op_cos.cc | 19 REGISTER5(UnaryOp, CPU, "Cos", functor::cos, float, Eigen::half, double,
23 REGISTER3(UnaryOp, GPU, "Cos", functor::cos, float, Eigen::half, double);
27 REGISTER2(UnaryOp, SYCL, "Cos", functor::cos, float, double);
|
| cwise_op_cosh.cc | 19 REGISTER4(UnaryOp, CPU, "Cosh", functor::cosh, float, double, complex64,
26 UnaryOp<SYCLDevice, functor::cosh<TYPE>>);
33 REGISTER2(UnaryOp, GPU, "Cosh", functor::cosh, float, double);
|
| cwise_op_exp.cc | 19 REGISTER5(UnaryOp, CPU, "Exp", functor::exp, float, Eigen::half, double,
23 REGISTER5(UnaryOp, GPU, "Exp", functor::exp, float, Eigen::half, double,
28 REGISTER2(UnaryOp, SYCL, "Exp", functor::exp, float, double);
|
| cwise_op_expm1.cc | 19 REGISTER5(UnaryOp, CPU, "Expm1", functor::expm1, float, Eigen::half, double,
22 REGISTER3(UnaryOp, GPU, "Expm1", functor::expm1, float, Eigen::half, double);
25 REGISTER2(UnaryOp, SYCL, "Expm1", functor::expm1, float, double);
|
| cwise_op_floor.cc | 19 REGISTER3(UnaryOp, CPU, "Floor", functor::floor, float, Eigen::half, double);
22 REGISTER3(UnaryOp, GPU, "Floor", functor::floor, float, Eigen::half, double);
25 REGISTER2(UnaryOp, SYCL, "Floor", functor::floor, float, double);
|
| cwise_op_isfinite.cc | 19 REGISTER3(UnaryOp, CPU, "IsFinite", functor::isfinite, float, Eigen::half,
23 REGISTER3(UnaryOp, GPU, "IsFinite", functor::isfinite, float, Eigen::half,
28 REGISTER2(UnaryOp, SYCL, "IsFinite", functor::isfinite, float, double);
|
| cwise_op_isinf.cc | 19 REGISTER3(UnaryOp, CPU, "IsInf", functor::isinf, float, Eigen::half, double);
22 REGISTER3(UnaryOp, GPU, "IsInf", functor::isinf, float, Eigen::half, double);
26 REGISTER2(UnaryOp, SYCL, "IsInf", functor::isinf, float, double);
|
| cwise_op_isnan.cc | 19 REGISTER3(UnaryOp, CPU, "IsNan", functor::isnan, float, Eigen::half, double);
22 REGISTER3(UnaryOp, GPU, "IsNan", functor::isnan, float, Eigen::half, double);
26 REGISTER2(UnaryOp, SYCL, "IsNan", functor::isnan, float, double);
|
| cwise_op_log.cc | 19 REGISTER5(UnaryOp, CPU, "Log", functor::log, float, Eigen::half, double,
23 REGISTER3(UnaryOp, GPU, "Log", functor::log, float, Eigen::half, double);
27 REGISTER2(UnaryOp, SYCL, "Log", functor::log, float, double);
|
| cwise_op_log1p.cc | 19 REGISTER5(UnaryOp, CPU, "Log1p", functor::log1p, float, Eigen::half, double,
23 REGISTER3(UnaryOp, GPU, "Log1p", functor::log1p, float, Eigen::half, double);
27 REGISTER2(UnaryOp, SYCL, "Log1p", functor::log1p, float, double);
|
| /frameworks/compile/mclinker/include/mcld/Script/ |
| UnaryOp.h | 1 //===- UnaryOp.h ----------------------------------------------------------===//
23 /** \class UnaryOp
28 class UnaryOp : public Operator {
32 UnaryOp() : Operator(Operator::UNARY, TYPE), m_pOperand(NULL) {}
35 ~UnaryOp() {}
46 IntOperand* UnaryOp<Operator::UNARY_PLUS>::eval(const Module&,
49 IntOperand* UnaryOp<Operator::UNARY_MINUS>::eval(const Module&,
52 IntOperand* UnaryOp<Operator::LOGICAL_NOT>::eval(const Module&,
55 IntOperand* UnaryOp<Operator::BITWISE_NOT>::eval(const Module&,
59 IntOperand* UnaryOp<Operator::ABSOLUTE>::eval(const Module&
[all...] |
