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    Searched refs:VEXT (Results 1 - 18 of 18) sorted by null

/frameworks/av/media/libstagefright/codecs/amrwbenc/src/asm/ARMV7/
pred_lt4_1_neon.s	72 VEXT.S16 D8, D8, D9, #1 73 VEXT.S16 D9, D9, D10, #1 74 VEXT.S16 D10, D10, D11, #1 75 VEXT.S16 D11, D11, D12, #1 77 VEXT.S16 D12, D12, D13, #1 78 VEXT.S16 D13, D13, D14, #1 85 VEXT.S16 D14, D14, D15, #1 88 VEXT.S16 D15, D15, D24, #1
Filt_6k_7k_neon.s	106 VEXT.8 Q4,Q4,Q5,#2 111 VEXT.8 Q5,Q5,Q6,#2 116 VEXT.8 Q6,Q6,Q7,#2 121 VEXT.8 Q7,Q7,Q8,#2 125 VEXT.8 Q8,Q8,Q15,#2 128 VEXT.8 Q4,Q4,Q5,#2 133 VEXT.8 Q5,Q5,Q6,#2 138 VEXT.8 Q6,Q6,Q7,#2 143 VEXT.8 Q7,Q7,Q8,#2 147 VEXT.8 Q8,Q8,Q15,#     [all...]
Syn_filt_32_neon.s	69 VEXT.8 D8, D8, D9, #2 74 VEXT.8 D9, D9, D10, #2 75 VEXT.8 D10, D10, D11, #2 88 VEXT.8 D4, D4, D5, #2 92 VEXT.8 D5, D5, D6, #2 93 VEXT.8 D6, D6, D7, #2 114 VEXT.8 D7, D7, D20, #2 121 VEXT.8 D11, D11, D21, #2
syn_filt_neon.s	75 VEXT.8 D4, D4, D5, #2 76 VEXT.8 D5, D5, D6, #2 77 VEXT.8 D6, D6, D7, #2 87 VEXT.8 D7, D7, D20, #2
/external/libxaac/decoder/armv7/
ixheaacd_tns_ar_filter_fixed.s	164 VEXT.32 Q6, Q7, Q6, #3 186 VEXT.32 Q11, Q6, Q11, #3 203 VEXT.32 Q6, Q7, Q6, #3 230 VEXT.32 Q12, Q11, Q12, #3 234 VEXT.32 Q11, Q6, Q11, #3 250 VEXT.32 Q6, Q7, Q6, #3 275 VEXT.32 Q14, Q12, Q14, #3 277 VEXT.32 Q12, Q11, Q12, #3 281 VEXT.32 Q11, Q6, Q11, #3 297 VEXT.32 Q6, Q7, Q6, #     [all...]
/external/libhevc/common/arm/
ihevc_sao_edge_offset_class0_chroma.s	170 VEXT.8 Q7,Q7,Q6,#14 @pu1_cur_row_tmp = vextq_u8(pu1_cur_row_tmp, pu1_cur_row, 14) 185 VEXT.8 Q14,Q14,Q15,#14 @II pu1_cur_row_tmp = vextq_u8(pu1_cur_row_tmp, pu1_cur_row, 14) 198 VEXT.8 Q7,Q6,Q7,#2 @pu1_cur_row_tmp = vextq_u8(pu1_cur_row, pu1_cur_row_tmp, 2) 209 VEXT.8 Q14,Q15,Q14,#2 @II pu1_cur_row_tmp = vextq_u8(pu1_cur_row, pu1_cur_row_tmp, 2) 333 VEXT.8 Q7,Q7,Q6,#14 @pu1_cur_row_tmp = vextq_u8(pu1_cur_row_tmp, pu1_cur_row, 15) 348 VEXT.8 Q14,Q14,Q15,#14 @II pu1_cur_row_tmp = vextq_u8(pu1_cur_row_tmp, pu1_cur_row, 15) 359 VEXT.8 Q7,Q6,Q7,#2 @pu1_cur_row_tmp = vextq_u8(pu1_cur_row, pu1_cur_row_tmp, 1) 374 VEXT.8 Q14,Q15,Q14,#2 @II pu1_cur_row_tmp = vextq_u8(pu1_cur_row, pu1_cur_row_tmp, 1)
ihevc_sao_edge_offset_class0.s	163 VEXT.8 Q7,Q7,Q6,#15 @pu1_cur_row_tmp = vextq_u8(pu1_cur_row_tmp, pu1_cur_row, 15) 179 VEXT.8 Q14,Q14,Q13,#15 @II Iteration pu1_cur_row_tmp = vextq_u8(pu1_cur_row_tmp, pu1_cur_row, 15) 187 VEXT.8 Q7,Q6,Q7,#1 @pu1_cur_row_tmp = vextq_u8(pu1_cur_row, pu1_cur_row_tmp, 1) 199 VEXT.8 Q14,Q13,Q14,#1 @II pu1_cur_row_tmp = vextq_u8(pu1_cur_row, pu1_cur_row_tmp, 1) 305 VEXT.8 Q7,Q7,Q6,#15 @pu1_cur_row_tmp = vextq_u8(pu1_cur_row_tmp, pu1_cur_row, 15) 313 VEXT.8 Q7,Q6,Q7,#1 @pu1_cur_row_tmp = vextq_u8(pu1_cur_row, pu1_cur_row_tmp, 1) 328 VEXT.8 Q10,Q10,Q11,#15 @sign_left = vextq_s8(sign_left, sign_left, 15)
ihevc_sao_edge_offset_class2.s	286 VEXT.8 Q9,Q8,Q9,#1 @I pu1_next_row_tmp = vextq_u8(pu1_next_row, pu1_next_row_tmp, 1) 316 VEXT.8 Q7,Q7,Q7,#15 @I sign_up = vextq_s8(sign_up, sign_up, 15) 358 VEXT.8 Q11,Q8,Q14,#1 @II pu1_next_row_tmp = vextq_u8(pu1_next_row, pu1_next_row_tmp, 1) 366 VEXT.8 Q9,Q15,Q9,#1 @III pu1_next_row_tmp = vextq_u8(pu1_next_row, pu1_next_row_tmp, 1) 396 VEXT.8 Q7,Q7,Q7,#15 @II sign_up = vextq_s8(sign_up, sign_up, 15) 411 VEXT.8 Q7,Q7,Q7,#15 @III sign_up = vextq_s8(sign_up, sign_up, 15) 467 VEXT.8 Q9,Q8,Q9,#1 @pu1_next_row_tmp = vextq_u8(pu1_next_row, pu1_next_row_tmp, 1) 486 VEXT.8 Q7,Q7,Q7,#15 @sign_up = vextq_s8(sign_up, sign_up, 15) 596 VEXT.8 Q9,Q8,Q9,#1 @pu1_next_row_tmp = vextq_u8(pu1_next_row, pu1_next_row_tmp, 1)     [all...]
ihevc_sao_edge_offset_class2_chroma.s	382 VEXT.8 Q9,Q8,Q9,#2 @I pu1_next_row_tmp = vextq_u8(pu1_next_row, pu1_next_row_tmp, 2) 424 VEXT.8 Q7,Q7,Q7,#14 @I sign_up = vextq_s8(sign_up, sign_up, 14) 470 VEXT.8 Q14,Q8,Q14,#2 @II pu1_next_row_tmp = vextq_u8(pu1_next_row, pu1_next_row_tmp, 2) 482 VEXT.8 Q9,Q15,Q9,#2 @III pu1_next_row_tmp = vextq_u8(pu1_next_row, pu1_next_row_tmp, 2) 525 VEXT.8 Q7,Q7,Q7,#14 @II sign_up = vextq_s8(sign_up, sign_up, 14) 560 VEXT.8 Q7,Q7,Q7,#14 @III sign_up = vextq_s8(sign_up, sign_up, 14) 616 VEXT.8 Q9,Q8,Q9,#2 @pu1_next_row_tmp = vextq_u8(pu1_next_row, pu1_next_row_tmp, 2)     [all...]
ihevc_sao_edge_offset_class3.s	301 VEXT.8 Q9,Q9,Q8,#15 @I pu1_next_row_tmp = vextq_u8(pu1_next_row_tmp, pu1_next_row, 15) 326 VEXT.8 Q7,Q7,Q7,#1 @I sign_up = vextq_s8(sign_up, sign_up, 1) 379 VEXT.8 Q9,Q9,Q8,#15 @II pu1_next_row_tmp = vextq_u8(pu1_next_row_tmp, pu1_next_row, 15) 413 VEXT.8 Q9,Q9,Q15,#15 @III pu1_next_row_tmp = vextq_u8(pu1_next_row_tmp, pu1_next_row, 15) 417 VEXT.8 Q7,Q7,Q7,#1 @II sign_up = vextq_s8(sign_up, sign_up, 1) 440 VEXT.8 Q7,Q7,Q7,#1 @III sign_up = vextq_s8(sign_up, sign_up, 1) 504 VEXT.8 Q9,Q9,Q8,#15 @pu1_next_row_tmp = vextq_u8(pu1_next_row_tmp, pu1_next_row, 15) 636 VEXT.8 Q9,Q9,Q8,#15 @pu1_next_row_tmp = vextq_u8(pu1_next_row_tmp, pu1_next_row, 15)     [all...]
ihevc_sao_edge_offset_class3_chroma.s	375 VEXT.8 Q9,Q9,Q8,#14 @I pu1_next_row_tmp = vextq_u8(pu1_next_row_tmp, pu1_next_row, 14) 415 VEXT.8 Q7,Q7,Q7,#2 @I sign_up = vextq_s8(sign_up, sign_up, 2) 470 VEXT.8 Q14,Q14,Q8,#14 @II pu1_next_row_tmp = vextq_u8(pu1_next_row_tmp, pu1_next_row, 14) 509 VEXT.8 Q9,Q9,Q15,#14 @III pu1_next_row_tmp = vextq_u8(pu1_next_row_tmp, pu1_next_row, 14) 525 VEXT.8 Q7,Q7,Q7,#2 @II sign_up = vextq_s8(sign_up, sign_up, 2) 552 VEXT.8 Q7,Q7,Q7,#2 @III sign_up = vextq_s8(sign_up, sign_up, 2) 625 VEXT.8 Q9,Q9,Q8,#14 @pu1_next_row_tmp = vextq_u8(pu1_next_row_tmp, pu1_next_row, 14)     [all...]
/external/libopus/celt/arm/
celt_pitch_xcorr_arm_gnu.s	91 VEXT.16 d16, d3, d4, #1 93 VEXT.16 d17, d4, d5, #1 95 VEXT.16 d16, d3, d4, #2 97 VEXT.16 d17, d4, d5, #2 99 VEXT.16 d16, d3, d4, #3 101 VEXT.16 d17, d4, d5, #3 117 VEXT.16 d16, d4, d5, #1 119 VEXT.16 d16, d4, d5, #2 121 VEXT.16 d16, d4, d5, #3 135 VEXT.16 d16, d4, d5, #     [all...]
/external/swiftshader/third_party/LLVM/lib/Target/ARM/
ARMISelLowering.h	154 VEXT, // extract
ARMISelLowering.cpp	[all...]
/external/llvm/lib/Target/ARM/
ARMISelLowering.h	152 VEXT, // extract
ARMISelLowering.cpp	[all...]
/external/valgrind/none/tests/arm/
neon128.stdout.exp	174 ---- VEXT ---- 175 vext.8 q0, q1, q2, #0 :: Qd 0x77777777 0x77777777 0x77777777 0x77777777 Qm (i8)0x00000077 Qn (i8)0x000000ff 176 vext.8 q0, q1, q2, #1 :: Qd 0xff777777 0x77777777 0x77777777 0x77777777 Qm (i8)0x00000077 Qn (i8)0x000000ff 177 vext.8 q0, q1, q2, #9 :: Qd 0xffffffff 0xffffffff 0xff777777 0x77777777 Qm (i8)0x00000077 Qn (i8)0x000000ff 178 vext.8 q0, q1, q2, #15 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffff77 Qm (i8)0x00000077 Qn (i8)0x000000ff 179 vext.8 q10, q11, q12, #4 :: Qd 0xffffffff 0x77777777 0x77777777 0x77777777 Qm (i8)0x00000077 Qn (i8)0x000000ff 180 vext.8 q0, q5, q15, #12 :: Qd 0xffffffff 0xffffffff 0xffffffff 0x77777777 Qm (i8)0x00000077 Qn (i8)0x000000ff     [all...]
neon64.stdout.exp	244 ---- VEXT ---- 245 vext.8 d0, d1, d2, #0 :: Qd 0x77777777 0x77777777 Qm (i8)0x00000077 Qn (i8)0x000000ff 246 vext.8 d0, d1, d2, #0 :: Qd 0x07060504 0x03020100 Qm (i8)0x00000077 Qn (i8)0x000000ff 247 vext.8 d0, d1, d2, #1 :: Qd 0xff777777 0x77777777 Qm (i8)0x00000077 Qn (i8)0x000000ff 248 vext.8 d0, d1, d2, #1 :: Qd 0xff070605 0x04030201 Qm (i8)0x00000077 Qn (i8)0x000000ff 249 vext.8 d0, d1, d2, #7 :: Qd 0xffffffff 0xffffff77 Qm (i8)0x00000077 Qn (i8)0x000000ff 250 vext.8 d0, d1, d2, #7 :: Qd 0xffffffff 0xffffff07 Qm (i8)0x00000077 Qn (i8)0x000000ff 251 vext.8 d0, d1, d2, #6 :: Qd 0xffffffff 0xffff7777 Qm (i8)0x00000077 Qn (i8)0x000000ff 252 vext.8 d0, d1, d2, #6 :: Qd 0xffffffff 0xffff0706 Qm (i8)0x00000077 Qn (i8)0x000000ff 253 vext.8 d10, d11, d12, #4 :: Qd 0xffffffff 0x77777777 Qm (i8)0x00000077 Qn (i8)0x000000f     [all...]

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