| /device/linaro/bootloader/edk2/MdeModulePkg/Bus/Pci/XhciDxe/ |
| XhciReg.c | 21 @param Xhc The XHCI Instance.
30 IN USB_XHCI_INSTANCE *Xhc,
37 Status = Xhc->PciIo->Mem.Read (
38 Xhc->PciIo,
57 @param Xhc The XHCI Instance.
66 IN USB_XHCI_INSTANCE *Xhc,
73 Status = Xhc->PciIo->Mem.Read (
74 Xhc->PciIo,
93 @param Xhc The XHCI Instance.
102 IN USB_XHCI_INSTANCE *Xhc,
[all...] |
| Xhci.c | 116 USB_XHCI_INSTANCE *Xhc;
125 Xhc = XHC_FROM_THIS (This);
127 *PortNumber = (UINT8) (Xhc->HcSParams1.Data.MaxPorts);
128 *Is64BitCapable = (UINT8) Xhc->Support64BitDma;
157 USB_XHCI_INSTANCE *Xhc;
161 Xhc = XHC_FROM_THIS (This);
163 if (Xhc->DevicePath != NULL) {
170 Xhc->DevicePath
182 if ((Xhc->DebugCapSupOffset != 0xFFFFFFFF) && ((XhcReadExtCapReg (Xhc, Xhc->DebugCapSupOffset) & 0xFF) == XHC_CAP_USB_DEBUG) &&
[all...] |
| XhciSched.c | 21 @param Xhc The XHCI Instance.
29 IN USB_XHCI_INSTANCE *Xhc,
42 Urb->Ring = &Xhc->CmdRing;
43 XhcSyncTrsRing (Xhc, Urb->Ring);
56 @param Xhc The XHCI Instance.
71 IN USB_XHCI_INSTANCE *Xhc,
83 if ((Xhc == NULL) || (CmdTrb == NULL)) {
89 if (XhcIsHalt (Xhc) || XhcIsSysError (Xhc)) {
97 Urb = XhcCreateCmdTrb (Xhc, CmdTrb);
[all...] |
| XhciReg.h | 229 @param Xhc The XHCI Instance.
238 IN USB_XHCI_INSTANCE *Xhc,
245 @param Xhc The XHCI Instance.
254 IN USB_XHCI_INSTANCE *Xhc,
261 @param Xhc The XHCI Instance.
270 IN USB_XHCI_INSTANCE *Xhc,
277 @param Xhc The XHCI Instance.
284 IN USB_XHCI_INSTANCE *Xhc,
292 @param Xhc The XHCI Instance.
299 IN USB_XHCI_INSTANCE *Xhc,
[all...] |
| XhciSched.h | 343 // A Command Completion Event TRB shall be generated by the xHC when a command completes on the
387 // The Enable Slot Command TRB causes the xHC to select an available Device Slot and return the ID of the
404 // internal xHC resources assigned to the slot.
421 // Addressed state and causes the xHC to select an address for the USB device in the Default State and
461 // The Evaluate Context Command TRB is used by system software to inform the xHC that the selected
462 // Context data structures in the Device Context have been modified by system software and that the xHC
499 // The Stop Endpoint Command TRB command allows software to stop the xHC execution of the TDs on a
500 // Transfer Ring and temporarily take ownership of TDs that had previously been passed to the xHC.
768 @param Xhc The XHCI Instance to be initialized.
773 IN USB_XHCI_INSTANCE *Xhc
[all...] |
| Xhci.h | 54 // XHC generic timeout experience values.
59 // XHC reset timeout experience values.
69 // XHC async transfer timer interval, set by experience.
75 // XHC raises TPL to TPL_NOTIFY to serialize all its operations
105 #define XHC_REG_BIT_IS_SET(Xhc, Offset, Bit) \
106 (XHC_BIT_IS_SET(XhcReadOpReg ((Xhc), (Offset)), (Bit)))
221 // stop the XHC DMA operation after exit boot service.
|
| /device/linaro/bootloader/edk2/MdeModulePkg/Bus/Pci/XhciPei/ |
| XhcPeim.c | 72 @param Xhc The XHCI device.
80 IN PEI_XHC_DEV *Xhc,
86 ASSERT (Xhc->CapLength != 0);
88 Data = MmioRead32 (Xhc->UsbHostControllerBaseAddress + Xhc->CapLength + Offset);
95 @param Xhc The XHCI device.
102 IN PEI_XHC_DEV *Xhc,
107 ASSERT (Xhc->CapLength != 0);
109 MmioWrite32 (Xhc->UsbHostControllerBaseAddress + Xhc->CapLength + Offset, Data);
[all...] |
| XhciSched.c | 23 @param Xhc The XHCI device.
31 IN PEI_XHC_DEV *Xhc,
44 Urb->Ring = &Xhc->CmdRing;
45 XhcPeiSyncTrsRing (Xhc, Urb->Ring);
58 @param Xhc The XHCI device.
72 IN PEI_XHC_DEV *Xhc,
84 if ((Xhc == NULL) || (CmdTrb == NULL)) {
90 if (XhcPeiIsHalt (Xhc) || XhcPeiIsSysError (Xhc)) {
98 Urb = XhcPeiCreateCmdTrb (Xhc, CmdTrb);
[all...] |
| XhciReg.h | 225 @param Xhc The XHCI device.
233 IN PEI_XHC_DEV *Xhc,
240 @param Xhc The XHCI device.
247 IN PEI_XHC_DEV *Xhc,
255 @param Xhc The XHCI device.
262 IN PEI_XHC_DEV *Xhc,
270 @param Xhc The XHCI device.
277 IN PEI_XHC_DEV *Xhc,
286 @param Xhc The XHCI device.
298 IN PEI_XHC_DEV *Xhc,
[all...] |
| XhciSched.h | 339 // A Command Completion Event TRB shall be generated by the xHC when a command completes on the
383 // The Enable Slot Command TRB causes the xHC to select an available Device Slot and return the ID of the
400 // internal xHC resources assigned to the slot.
417 // Addressed state and causes the xHC to select an address for the USB device in the Default State and
457 // The Evaluate Context Command TRB is used by system software to inform the xHC that the selected
458 // Context data structures in the Device Context have been modified by system software and that the xHC
495 // The Stop Endpoint Command TRB command allows software to stop the xHC execution of the TDs on a
496 // Transfer Ring and temporarily take ownership of TDs that had previously been passed to the xHC.
763 @param Xhc The XHCI device.
775 IN PEI_XHC_DEV *Xhc,
[all...] |
| /external/webrtc/data/voice_engine/stereo_rtp_files/ |
| toggling_stereo_g729_pt18_pt125.rtp | 329 ???!? )??I ?^?I??XX??????r )??J ?_I??X??,0h??F )??K ?_eI??X8??F?nY??? )??L ?_?I??X?6?c;h???? )??M ?`I??X?v?D?1y?? )€N ?`UI??X??S??oNR? )?O ?`?I??X ??v?'SA ? )?P ?`?I??X=K?r?krA?[ )??Q ?aEI??X%??w?[? ? )?R ?a?I??X+p??9Pn )?S ?a?I??X@lU? S?? )??T ?b5I??X8S?H??? ?? *?U ?b?I??X% * * *&?V ?cuI??X?? *0 *: *D?W ?deI??X?b?/Y????D *N?X ?d?I??X??W?J?y4$ *X?Y ?eI??X?*??6I?? *b?Z ?eUI??X???p???$r *l?[ ?e?I??X\P?*Y`E??? *v?\ ?e?I??X0?????)?p *??] ?fEI??X?h???? *??^ ?f?I??X-???x???h? *??_ ?f?I??X&????n??? *??` ?g5I??Xr?o?C?.?? *??a ?g?I??X?p?Be{? X *??b ?g?I??XJ?????T#^J *??c ?h%I??XNV???T?? *?d ?huI??Xh??? N???? *?e ?h?I??Xy??E ?4? *?f ?iI??XJ???$???u7 *?g ?ieI??X?V?????)X *?h ?i?I??Xy??Zo ? ( *??}i ?jI??X"??QvaR;??"??QvaR;?? ( +?}j ?jUI??X(?VRK5? (?VRK5? ( + ?}k ?j?I??XJ??:0?j?J??:0?j? ( +?}l ?j?I??Xhc?_?"u? hc?_?"u? ( + ?}m ?kEI??X
[all...] |
