| /external/vixl/test/ |
| test-operands.cc | 33 #include "aarch32/operands-aarch32.h"
44 aarch32::Operand op = aarch32::Operand::From(42);
50 aarch32::Operand op = aarch32::Operand::From(-42);
58 aarch32::Operand op = aarch32::Operand::From(-1);
64 aarch32::Operand op = aarch32::Operand::From(UINT32_MAX)
[all...] |
| test-code-generation-scopes.cc | 30 #include "aarch32/macro-assembler-aarch32.h"
31 #include "aarch32/test-utils-aarch32.h"
55 aarch32::MacroAssembler masm;
58 CodeBufferCheckScope scope(&masm, aarch32::kA32InstructionSizeInBytes);
59 __ Mov(aarch32::r0, 0);
83 aarch32::MacroAssembler masm;
86 CodeBufferCheckScope scope(&masm, 2 * aarch32::kA32InstructionSizeInBytes);
87 __ Mov(aarch32::r0, 0)
[all...] |
| /art/compiler/optimizing/ |
| common_arm.h | 29 #include "aarch32/macro-assembler-aarch32.h"
39 static_assert(vixl::aarch32::kSpCode == SP, "vixl::aarch32::kSpCode must equal ART's SP");
41 inline dwarf::Reg DWARFReg(vixl::aarch32::Register reg) {
45 inline dwarf::Reg DWARFReg(vixl::aarch32::SRegister reg) {
49 inline vixl::aarch32::Register HighRegisterFrom(Location location) {
51 return vixl::aarch32::Register(location.AsRegisterPairHigh<vixl::aarch32::Register>());
54 inline vixl::aarch32::DRegister HighDRegisterFrom(Location location)
[all...] |
| code_generator_arm_vixl.h | 33 #include "aarch32/constants-aarch32.h"
34 #include "aarch32/instructions-aarch32.h"
35 #include "aarch32/macro-assembler-aarch32.h"
44 15 * vixl::aarch32::kMaxInstructionSizeInBytes;
46 static const vixl::aarch32::Register kParameterCoreRegistersVIXL[] = {
47 vixl::aarch32::r1,
48 vixl::aarch32::r2
[all...] |
| /device/linaro/bootloader/arm-trusted-firmware/plat/arm/board/juno/sp_min/ |
| sp_min-juno.mk | 8 BL32_SOURCES += lib/cpus/aarch32/cortex_a53.S \
9 lib/cpus/aarch32/cortex_a57.S \
10 lib/cpus/aarch32/cortex_a72.S \
|
| /device/linaro/bootloader/arm-trusted-firmware/plat/arm/common/sp_min/ |
| arm_sp_min.mk | 11 plat/common/aarch32/platform_mp_stack.S \
|
| /external/vixl/tools/ |
| generate_tests.py | 45 - test/aarch32/test-assembler-cond-rd-rn-immediate-a32.cc
46 - test/aarch32/test-assembler-cond-rd-rn-rm-a32.cc
47 - test/aarch32/test-assembler-cond-rd-rn-rm-q-a32.cc
48 - test/aarch32/test-assembler-cond-rd-rn-rm-ge-a32.cc
51 generated dummy trace files in `test/aarch32/traces/`. If you look at them
54 $ cat test/aarch32/traces/sim-cond-rd-rn-immediate-adc-a32.h
69 --aarch32-only
81 generates tests according to them. These files live in `test/aarch32/config` by
88 test/aarch32/config/cond-rd-rn-immediate-a32.json
89 `-> test/aarch32/test-simulator-cond-rd-rn-immediate-a32.c
[all...] |
| /device/linaro/bootloader/arm-trusted-firmware/lib/compiler-rt/ |
| compiler-rt.mk | 31 ifeq (${ARCH},aarch32)
|
| /art/compiler/utils/arm/ |
| managed_register_arm.h | 29 #include "aarch32/macro-assembler-aarch32.h"
100 vixl::aarch32::Register AsVIXLRegister() const {
102 return vixl::aarch32::Register(id_);
110 vixl::aarch32::SRegister AsVIXLSRegister() const {
112 return vixl::aarch32::SRegister(id_ - kNumberOfCoreRegIds);
120 vixl::aarch32::DRegister AsVIXLDRegister() const {
122 return vixl::aarch32::DRegister(id_ - kNumberOfCoreRegIds - kNumberOfSRegIds);
153 vixl::aarch32::Register AsVIXLRegisterPairLow() const {
154 return vixl::aarch32::Register(AsRegisterPairLow())
[all...] |
| assembler_arm_vixl.h | 34 #include "aarch32/macro-assembler-aarch32.h"
37 namespace vixl32 = vixl::aarch32;
223 vixl::aarch32::FlagsUpdate update_flags = vixl::aarch32::DontCare);
243 vixl::aarch32::Literal<T>* CreateLiteralDestroyedWithPool(T value) {
244 vixl::aarch32::Literal<T>* literal =
245 new vixl::aarch32::Literal<T>(value,
|
| /art/disassembler/ |
| disassembler_arm.cc | 29 #include "aarch32/disasm-aarch32.h"
30 #include "aarch32/instructions-aarch32.h"
36 using vixl::aarch32::MemOperand;
37 using vixl::aarch32::PrintDisassembler;
38 using vixl::aarch32::pc;
40 static const vixl::aarch32::Register tr(TR);
76 DisassemblerStream& operator<<(vixl::aarch32::Register reg) OVERRIDE {
99 DisassemblerStream& operator<<(const vixl::aarch32::AlignedMemOperand& operand) OVERRIDE
[all...] |
| /device/linaro/bootloader/arm-trusted-firmware/bl32/sp_min/ |
| sp_min.mk | 7 ifneq (${ARCH}, aarch32)
8 $(error SP_MIN is only supported on AArch32 platforms)
16 bl32/sp_min/aarch32/entrypoint.S \
|
| /device/linaro/bootloader/arm-trusted-firmware/plat/arm/board/fvp/sp_min/ |
| sp_min-fvp.mk | 9 plat/arm/board/fvp/aarch32/fvp_helpers.S \
|
| /external/vixl/src/aarch32/ |
| location-aarch32.h | 43 #include "constants-aarch32.h"
44 #include "instructions-aarch32.h"
48 namespace aarch32 { namespace in namespace:vixl
389 } // namespace aarch32
394 aarch32::Location::ForwardRef, aarch32::Location::kNPreallocatedElements, \
395 int32_t, aarch32::Location::kInvalidLinkKey, \
396 aarch32::Location::kReclaimFrom, aarch32::Location::kReclaimFactor
399 const aarch32::Location::ForwardRef& element)
[all...] |
| /art/compiler/linker/arm/ |
| relative_patcher_thumb2.cc | 184 vixl::aarch32::Register base_reg,
185 vixl::aarch32::MemOperand& lock_word,
186 vixl::aarch32::Label* slow_path,
188 using namespace vixl::aarch32; // NOLINT(build/namespaces)
207 vixl::aarch32::Register entrypoint) {
208 using vixl::aarch32::MemOperand;
209 using vixl::aarch32::ip;
211 const vixl::aarch32::Register tr = vixl::aarch32::r9;
225 using namespace vixl::aarch32; // NOLINT(build/namespaces
[all...] |
| /device/linaro/bootloader/arm-trusted-firmware/make_helpers/ |
| defaults.mk | 13 # The AArch32 Secure Payload to be built as BL32 image
16 # The Target build architecture. Supported values are: aarch64, aarch32.
40 # Build flag to include AArch32 registers in cpu context save and restore during
150 ifeq (${ARCH},aarch32)
|
| /external/vixl/examples/aarch32/ |
| custom-aarch32-disasm.cc | 31 #include "aarch32/constants-aarch32.h"
32 #include "aarch32/disasm-aarch32.h"
33 #include "aarch32/instructions-aarch32.h"
34 #include "aarch32/macro-assembler-aarch32.h"
39 namespace aarch32 { namespace in namespace:vixl
143 } // namespace aarch32
[all...] |
| examples.h | 40 #include "aarch32/constants-aarch32.h"
41 #include "aarch32/instructions-aarch32.h"
42 #include "aarch32/macro-assembler-aarch32.h"
45 using namespace vixl::aarch32;
96 // This is the example used in doc/getting-started-aarch32.md
|
| /external/vixl/benchmarks/aarch32/ |
| bench-branch-link-masm.cc | 31 #include "aarch32/constants-aarch32.h"
32 #include "aarch32/instructions-aarch32.h"
33 #include "aarch32/macro-assembler-aarch32.h"
36 using namespace vixl::aarch32;
|
| bench-branch-masm.cc | 31 #include "aarch32/constants-aarch32.h"
32 #include "aarch32/instructions-aarch32.h"
33 #include "aarch32/macro-assembler-aarch32.h"
36 using namespace vixl::aarch32;
|
| bench-dataop.cc | 31 #include "aarch32/constants-aarch32.h"
32 #include "aarch32/instructions-aarch32.h"
33 #include "aarch32/macro-assembler-aarch32.h"
36 using namespace vixl::aarch32;
|
| bench-literal.cc | 31 #include "aarch32/constants-aarch32.h"
32 #include "aarch32/instructions-aarch32.h"
33 #include "aarch32/macro-assembler-aarch32.h"
36 using namespace vixl::aarch32;
|
| /art/compiler/trampolines/ |
| trampoline_compiler.cc | 61 using vixl::aarch32::MemOperand;
62 using vixl::aarch32::pc;
63 using vixl::aarch32::r0;
71 vixl::aarch32::UseScratchRegisterScope temps(assembler.GetVIXLAssembler());
72 const vixl::aarch32::Register temp_reg = temps.Acquire();
|
| /art/compiler/utils/ |
| assembler_thumb_test.cc | 294 #define R0 vixl::aarch32::r0
295 #define R2 vixl::aarch32::r2
296 #define R4 vixl::aarch32::r4
297 #define R12 vixl::aarch32::r12
321 vixl::aarch32::UseScratchRegisterScope temps(assembler.asm_.GetVIXLAssembler());
354 vixl::aarch32::UseScratchRegisterScope temps(assembler.asm_.GetVIXLAssembler());
|
| /device/linaro/bootloader/arm-trusted-firmware/plat/arm/board/fvp/ |
| platform.mk | 63 ifeq (${ARCH}, aarch32)
64 $(error "GICV3 Legacy driver not supported for AArch32 build")
105 FVP_CPU_LIBS += lib/cpus/aarch32/cortex_a32.S
154 ifeq (${ARCH},aarch32)
|
