| /external/mesa3d/src/mesa/drivers/dri/i965/ |
| brw_cfg.h | 50 struct backend_instruction;
65 backend_instruction *start();
66 const backend_instruction *start() const;
67 backend_instruction *end();
68 const backend_instruction *end() const;
78 backend_instruction *first_non_control_flow_inst();
79 backend_instruction *last_non_control_flow_inst();
97 static inline struct backend_instruction *
100 return (struct backend_instruction *)exec_list_get_head(&block->instructions);
103 static inline const struct backend_instruction *
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| brw_dead_control_flow.cpp | 49 backend_instruction *const inst = block->start();
50 backend_instruction *const prev_inst = prev_block->end();
58 backend_instruction *const else_inst = prev_inst;
66 backend_instruction *const endif_inst = inst;
67 backend_instruction *const if_inst = prev_inst;
102 backend_instruction *const if_inst = prev_inst;
103 backend_instruction *const else_inst = inst;
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| intel_asm_annotation.h | 31 struct backend_instruction;
68 struct backend_instruction *inst, unsigned offset);
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| brw_shader.h | 96 struct backend_instruction : public exec_node { struct in inherits:exec_node
109 void insert_after(bblock_t *block, backend_instruction *inst);
110 void insert_before(bblock_t *block, backend_instruction *inst);
126 struct backend_instruction { struct in struct:backend_instruction
210 * backend_instruction)
223 virtual void dump_instruction(backend_instruction *inst) = 0;
224 virtual void dump_instruction(backend_instruction *inst, FILE *file) = 0;
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| brw_predicated_break.cpp | 68 backend_instruction *jump_inst = block->end();
73 backend_instruction *if_inst = block->prev()->end();
77 backend_instruction *endif_inst = block->next()->start();
122 backend_instruction *while_inst = while_block->start();
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| brw_shader.cpp | 746 backend_instruction::is_commutative() const
769 backend_instruction::is_3src(const struct gen_device_info *devinfo) const
775 backend_instruction::is_tex() const
796 backend_instruction::is_math() const
811 backend_instruction::is_control_flow() const
828 backend_instruction::can_do_source_mods() const
847 backend_instruction::can_do_saturate() const
891 backend_instruction::can_do_cmod() const
938 backend_instruction::reads_accumulator_implicitly() const
951 backend_instruction::writes_accumulator_implicitly(const struct gen_device_info *devinfo) cons
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| brw_schedule_instructions.cpp | 65 schedule_node(backend_instruction *inst, instruction_scheduler *sched);
69 backend_instruction *inst;
501 virtual int issue_time(backend_instruction *inst) = 0;
503 virtual void count_reads_remaining(backend_instruction *inst) = 0;
505 virtual void update_register_pressure(backend_instruction *inst) = 0;
506 virtual int get_register_pressure_benefit(backend_instruction *inst) = 0;
575 int issue_time(backend_instruction *inst);
578 void count_reads_remaining(backend_instruction *inst);
580 void update_register_pressure(backend_instruction *inst);
581 int get_register_pressure_benefit(backend_instruction *inst)
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| brw_cfg.cpp | 93 ends_block(const backend_instruction *inst)
105 starts_block(const backend_instruction *inst)
147 foreach_inst_in_block(backend_instruction, inst, this) {
177 foreach_in_list_safe(backend_instruction, inst, instructions) {
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| brw_fs.h | 277 void dump_instruction(backend_instruction *inst);
278 void dump_instruction(backend_instruction *inst, FILE *file);
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| brw_vec4.h | 318 void dump_instruction(backend_instruction *inst);
319 void dump_instruction(backend_instruction *inst, FILE *file);
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| brw_fs_register_coalesce.cpp | 285 foreach_block_and_inst_safe (block, backend_instruction, inst, cfg) {
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| intel_asm_annotation.c | 105 struct backend_instruction *inst, unsigned offset)
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| brw_ir_fs.h | 317 class fs_inst : public backend_instruction {
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| brw_ir_vec4.h | 266 class vec4_instruction : public backend_instruction {
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| brw_vec4.cpp | 251 if (!backend_instruction::can_do_source_mods())
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| brw_fs.cpp | 380 if (!backend_instruction::can_do_source_mods())
401 return this->eot || backend_instruction::has_side_effects();
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