/device/linaro/bootloader/edk2/EdkCompatibilityPkg/Foundation/Library/EfiCommonLib/Ia32/ |
GetPowerOfTwo.S | 56 bsrl %ecx, %ecx
62 bsrl %ecx, %ecx
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/toolchain/binutils/binutils-2.27/gas/testsuite/gas/m68k/ |
br-isab.d | 12 2: 61ff ffff fffc bsrl 0 <foo> 17 12: 61ff 0000 0000 bsrl 14 <foo\+0x14>
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br-isac.d | 12 2: 61ff ffff fffc bsrl 0 <foo> 19 18: 61ff 0000 0000 bsrl 1a <foo\+0x1a>
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pcrel.s | 17 bsrl lbl_a
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/toolchain/binutils/binutils-2.27/ld/testsuite/ld-m68k/ |
plt1-isac.d | 22 2082a: 61ff ffff ffd4 bsrl 20800 <f.@plt-0x18> 30 20842: 61ff ffff ffbc bsrl 20800 <f.@plt-0x18> 38 2085a: 61ff ffff ffa4 bsrl 20800 <f.@plt-0x18> 42 20c00: 61ff ffff fc.. bsrl 208.. <f1@plt> 43 20c06: 61ff ffff fc.. bsrl 208.. <f2@plt> 44 20c0c: 61ff ffff fc.. bsrl 208.. <f3@plt>
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plt1-68020.d | 33 20c00: 61ff ffff fc.. bsrl 208.. <f1@plt> 34 20c06: 61ff ffff fc.. bsrl 208.. <f2@plt> 35 20c0c: 61ff ffff fc.. bsrl 208.. <f3@plt>
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plt1-cpu32.d | 41 20c00: 61ff ffff fc.. bsrl 208.. <f1@plt> 42 20c06: 61ff ffff fc.. bsrl 208.. <f2@plt> 43 20c0c: 61ff ffff fc.. bsrl 208.. <f3@plt>
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plt1-isab.d | 42 20c00: 61ff ffff fc.. bsrl 208.. <f1@plt> 43 20c06: 61ff ffff fc.. bsrl 208.. <f2@plt> 44 20c0c: 61ff ffff fc.. bsrl 208.. <f3@plt>
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/external/swiftshader/third_party/LLVM/test/MC/MBlaze/ |
mblaze_shift.s | 9 # CHECK: bsrl 12 bsrl r1, r2, r3
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/external/compiler-rt/lib/builtins/i386/ |
udivdi3.S | 27 bsrl %ebx, %ecx // If the high word of b is zero, jump to
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umoddi3.S | 28 bsrl %ebx, %ecx // If the high word of b is zero, jump to
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divdi3.S | 56 bsrl %ebx, %ecx // If the high word of b is zero, jump to
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moddi3.S | 55 bsrl %ebx, %ecx // If the high word of b is zero, jump to
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/toolchain/binutils/binutils-2.27/opcodes/ |
microblaze-opcm.h | 31 idiv, idivu, bsll, bsra, bsrl, get, put, nget, nput, cget, cput, enumerator in enum:microblaze_instr
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microblaze-opc.h | 148 {"bsrl", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x44000000, OPCODE_MASK_H3, bsrl, barrel_shift_inst }, [all...] |
/art/compiler/utils/x86/ |
assembler_x86_test.cc | 359 TEST_F(AssemblerX86Test, Bsrl) { 360 DriverStr(RepeatRR(&x86::X86Assembler::bsrl, "bsrl %{reg2}, %{reg1}"), "bsrl"); 364 DriverStr(RepeatRA(&x86::X86Assembler::bsrl, "bsrl {mem}, %{reg}"), "bsrl_address");
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assembler_x86.h | 344 void bsrl(Register dst, Register src); 345 void bsrl(Register dst, const Address& src);
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assembler_x86.cc | 202 void X86Assembler::bsrl(Register dst, Register src) { function in class:art::x86::X86Assembler 209 void X86Assembler::bsrl(Register dst, const Address& src) { function in class:art::x86::X86Assembler [all...] |
/art/compiler/utils/x86_64/ |
assembler_x86_64.h | 790 void bsrl(CpuRegister dst, CpuRegister src); 791 void bsrl(CpuRegister dst, const Address& src); [all...] |
assembler_x86_64_test.cc | [all...] |
assembler_x86_64.cc | 3229 void X86_64Assembler::bsrl(CpuRegister dst, CpuRegister src) { function in class:art::x86_64::X86_64Assembler 3237 void X86_64Assembler::bsrl(CpuRegister dst, const Address& src) { function in class:art::x86_64::X86_64Assembler [all...] |
/external/valgrind/none/tests/amd64/ |
fb_test_amd64.c | 882 TEST_BSX(bsrl, "", 0); 883 TEST_BSX(bsrl, "", 0x00340128);
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/art/compiler/optimizing/ |
intrinsics_x86.cc | [all...] |
intrinsics_x86_64.cc | [all...] |
/external/syslinux/gpxe/src/arch/i386/prefix/ |
romprefix.S | 348 bsrl %eax, %ecx
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