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  /tools/test/connectivity/acts/tests/google/power/tel/lab/
genTests.py 4 bwl = [1.4, 3, 5, 10, 20] variable
6 bwl = [5, 10, 20] variable
8 bwl = [5, 10] variable
10 for bw in bwl:
  /toolchain/binutils/binutils-2.27/gas/config/
rx-parse.y 141 %type <regno> flag bwl bw memex
471 | PUSH bwl REG
530 | SUNTIL bwl
532 | SWHILE bwl
534 | SSTR bwl
539 | RMPA bwl
561 | MOV bwl REG ',' EXPR '[' REG ']'
569 | MOV bwl EXPR '[' REG ']' ',' REG
583 | MOV bwl REG ',' '[' REG ']'
588 | MOV bwl '[' REG ']' ',' disp '[' REG ']
1069 bwl : { $$ = LSIZE; } label
    [all...]
  /external/libvpx/libvpx/vpx_dsp/
avg.c 165 // bwl: {2, 3, 4}
166 int vpx_vector_var_c(const int16_t *ref, const int16_t *src, const int bwl) {
168 int width = 4 << bwl;
178 var = sse - ((mean * mean) >> (bwl + 2));
  /external/libvpx/libvpx/vpx_dsp/arm/
avg_neon.c 147 // bwl = {2, 3, 4}, width = {16, 32, 64}
148 int vpx_vector_var_neon(int16_t const *ref, int16_t const *src, const int bwl) {
149 int width = 4 << bwl;
183 const int shift_factor = bwl + 2;
  /external/libvpx/libvpx/vpx_dsp/x86/
avg_intrin_sse2.c 383 int vpx_vector_var_sse2(int16_t const *ref, int16_t const *src, const int bwl) {
385 int width = 4 << bwl;
423 return _mm_cvtsi128_si32(sse) - ((mean * mean) >> (bwl + 2));
  /toolchain/binutils/binutils-2.27/opcodes/
rx-decode.opc 47 static int bwl[] =
86 /* This is for the BWL and BW bitfields. */
101 *D standard displacement: type (r,[r],dsp8,dsp16 code), register, BWL code
110 #define DD(t,r,s) rx_disp (0, t, r, bwl[s], ld);
118 #define SD(t,r,s) rx_disp (1, t, r, bwl[s], ld);
127 #define S2D(t,r,s) rx_disp (2, t, r, bwl[s], ld);
132 #define BWL(sz) rx->op[0].size = rx->op[1].size = rx->op[2].size = rx->size = bwl[sz]
277 BWL(LSIZE);
293 BWL (sz)
    [all...]
rx-decode.c 48 static int bwl[] = variable
87 /* This is for the BWL and BW bitfields. */
102 *D standard displacement: type (r,[r],dsp8,dsp16 code), register, BWL code
111 #define DD(t,r,s) rx_disp (0, t, r, bwl[s], ld);
119 #define SD(t,r,s) rx_disp (1, t, r, bwl[s], ld);
128 #define S2D(t,r,s) rx_disp (2, t, r, bwl[s], ld);
133 #define BWL(sz) rx->op[0].size = rx->op[1].size = rx->op[2].size = rx->size = bwl[sz]
278 BWL(LSIZE);
    [all...]
  /external/libvpx/libvpx/vpx_dsp/mips/
avg_msa.c 567 int vpx_vector_var_msa(const int16_t *ref, const int16_t *src, const int bwl) {
576 if (2 == bwl) {
594 } else if (3 == bwl) {
620 } else if (4 == bwl) {
665 const int width = 4 << bwl;
678 var = sse - ((mean * mean) >> (bwl + 2));
  /external/libvpx/libvpx/vp9/decoder/
vp9_decodeframe.c 707 static void set_plane_n4(MACROBLOCKD *const xd, int bw, int bh, int bwl,
713 xd->plane[i].n4_wl = bwl - xd->plane[i].subsampling_x;
720 int bh, int x_mis, int y_mis, int bwl, int bhl) {
727 // TODO(slavarnway): Generate sb_type based on bwl and bhl, instead of
735 set_plane_n4(xd, bw, bh, bwl, bhl);
748 int mi_col, BLOCK_SIZE bsize, int bwl, int bhl) {
751 const int bw = 1 << (bwl - 1);
759 y_mis, bwl, bhl);
    [all...]
  /external/libvpx/libvpx/vp9/encoder/
vp9_mcomp.c     [all...]
vp9_encodemb.c 746 const int bwl = b_width_log2_lookup[plane_bsize]; local
747 const int diff_stride = 4 * (1 << bwl);
780 xd, bwl, tx_size, mode, (x->skip_encode || x->fp_src_pred) ? src : dst,
    [all...]
vp9_rdopt.c 2377 int bwl = b_width_log2_lookup[bsize]; local
    [all...]
  /external/libvpx/config/mips32-msa/
vpx_dsp_rtcd.h     [all...]
  /external/libvpx/config/mips64-msa/
vpx_dsp_rtcd.h     [all...]
  /external/libvpx/config/arm-neon/
vpx_dsp_rtcd.h     [all...]
  /external/libvpx/config/arm64/
vpx_dsp_rtcd.h     [all...]
  /external/libvpx/config/x86/
vpx_dsp_rtcd.h     [all...]
  /external/libvpx/config/x86_64/
vpx_dsp_rtcd.h     [all...]
  /external/libvpx/config/arm/
vpx_dsp_rtcd.h     [all...]
  /external/libvpx/config/generic/
vpx_dsp_rtcd.h     [all...]
  /external/libvpx/config/mips32/
vpx_dsp_rtcd.h     [all...]
  /external/libvpx/config/mips32-dspr2/
vpx_dsp_rtcd.h     [all...]
  /external/libvpx/config/mips64/
vpx_dsp_rtcd.h     [all...]

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