| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/aarch64/ |
| verbose-error.s | 38 fcvtxn2 v24.8b, v25.8b
|
| verbose-error.l | 111 [^:]*:38: Error: operand mismatch -- `fcvtxn2 v24.8b,v25.8b'
113 [^:]*:38: Info: fcvtxn2 v24.4s,v25.2d
|
| /external/llvm/test/MC/AArch64/ |
| neon-simd-misc.s | 437 fcvtxn2 v6.4s, v8.2d
440 // CHECK: fcvtxn2 v6.4s, v8.2d // encoding: [0x06,0x69,0x61,0x6e]
[all...] |
| arm64-advsimd.s | [all...] |
| neon-diagnostics.s | [all...] |
| /external/capstone/suite/MC/AArch64/ |
| neon-simd-misc.s.cs | 138 0x06,0x69,0x61,0x6e = fcvtxn2 v6.4s, v8.2d
|
| /external/vixl/src/aarch64/ |
| assembler-aarch64.h | [all...] |
| macro-assembler-aarch64.h | [all...] |
| simulator-aarch64.h | [all...] |
| simulator-aarch64.cc | [all...] |
| assembler-aarch64.cc | [all...] |
| logic-aarch64.cc | 4587 LogicVRegister Simulator::fcvtxn2(VectorFormat vform, function in class:vixl::aarch64::Simulator
[all...] |
| /external/vixl/test/aarch64/ |
| test-trace-aarch64.cc | [all...] |
| /external/valgrind/none/tests/arm64/ |
| fp_and_simd.stdout.exp | [all...] |
