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Searched
refs:hregClass
(Results
1 - 17
of
17
) sorted by null
/external/valgrind/VEX/priv/
host_generic_reg_alloc2.c
70
HRegClass
reg_class;
620
vreg_lrs[k].reg_class =
hregClass
(vreg);
623
vassert(vreg_lrs[k].reg_class ==
hregClass
(vreg));
898
definition of
HRegClass
in host_generic_regs.h, that means,
903
HRegClass
. */
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all
...]
host_generic_regs.c
47
void ppHRegClass (
HRegClass
hrc )
73
switch (
hregClass
(r)) {
host_generic_regs.h
80
HRegClass
rc:4; // the register's
HRegClass
91
/*
HRegClass
describes host register classes which the instruction
111
When adding entries to enum
HRegClass
, do not use any value > 14 or < 1.
123
HRegClass
;
125
extern void ppHRegClass (
HRegClass
);
134
static inline HReg mkHReg ( Bool virtual,
HRegClass
rc, UInt enc, UInt ix )
149
static inline
HRegClass
hregClass
( HReg r )
151
HRegClass
rc = (HRegClass)((r.u32 >> 27) & 0xF)
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...]
host_mips_isel.c
322
vassert(
hregClass
(r_dst) ==
hregClass
(r_src));
323
vassert(
hregClass
(r_src) == HRcInt32 ||
hregClass
(r_src) == HRcInt64);
354
vassert(
hregClass
(r_srcHi) == HRcInt32);
355
vassert(
hregClass
(r_srcLo) == HRcInt32);
686
return toBool(
hregClass
(am->Mam.IR.base) == HRcGPR(mode64) &&
690
return toBool(
hregClass
(am->Mam.RR.base) == HRcGPR(mode64) &&
692
hregClass
(am->Mam.RR.index) == HRcGPR(mode64) &&
782
vassert(
hregClass
(r) == HRcGPR(env->mode64))
[
all
...]
host_arm_defs.c
151
switch (
hregClass
(reg)) {
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...]
host_arm64_isel.c
816
toBool(
hregClass
(am->ARM64am.RI9.reg) == HRcInt64
824
toBool(
hregClass
(am->ARM64am.RI12.reg) == HRcInt64
832
toBool(
hregClass
(am->ARM64am.RR.base) == HRcInt64
834
&&
hregClass
(am->ARM64am.RR.index) == HRcInt64
[
all
...]
host_x86_isel.c
291
vassert(
hregClass
(src) == HRcInt32);
292
vassert(
hregClass
(dst) == HRcInt32);
301
vassert(
hregClass
(src) == HRcVec128);
302
vassert(
hregClass
(dst) == HRcVec128);
845
vassert(
hregClass
(r) == HRcInt32);
[
all
...]
host_ppc_isel.c
519
vassert(
hregClass
(r_dst) ==
hregClass
(r_src));
520
vassert(
hregClass
(r_src) == HRcInt32 ||
521
hregClass
(r_src) == HRcInt64);
574
vassert(
hregClass
(r_srcHi) == HRcInt32);
575
vassert(
hregClass
(r_srcLo) == HRcInt32);
599
vassert(
hregClass
(r_src) == HRcInt64);
[
all
...]
host_amd64_isel.c
266
toBool(
hregClass
(am->Aam.IR.reg) == HRcInt64
271
toBool(
hregClass
(am->Aam.IRRS.base) == HRcInt64
273
&&
hregClass
(am->Aam.IRRS.index) == HRcInt64
312
vassert(
hregClass
(src) == HRcInt64);
313
vassert(
hregClass
(dst) == HRcInt64);
321
vassert(
hregClass
(src) == HRcVec128);
322
vassert(
hregClass
(dst) == HRcVec128);
906
vassert(
hregClass
(r) == HRcInt64);
[
all
...]
host_s390_isel.c
[
all
...]
host_amd64_defs.c
116
switch (
hregClass
(reg)) {
145
switch (
hregClass
(reg)) {
[
all
...]
host_mips_defs.c
159
vassert(
hregClass
(reg) == HRcInt32 ||
hregClass
(reg) == HRcInt64 ||
160
hregClass
(reg) == HRcFlt32 ||
hregClass
(reg) == HRcFlt64);
163
switch (
hregClass
(reg)) {
[
all
...]
host_arm_isel.c
284
vassert(
hregClass
(src) == HRcInt32);
285
vassert(
hregClass
(dst) == HRcInt32);
883
toBool(
hregClass
(am->ARMam1.RI.reg) == HRcInt32
890
toBool(
hregClass
(am->ARMam1.RRS.base) == HRcInt32
892
&&
hregClass
(am->ARMam1.RRS.index) == HRcInt32
952
toBool(
hregClass
(am->ARMam2.RI.reg) == HRcInt3
[
all
...]
host_x86_defs.c
109
switch (
hregClass
(reg)) {
829
vassert(
hregClass
(dst) == HRcVec128);
[
all
...]
host_arm64_defs.c
153
switch (
hregClass
(reg)) {
[
all
...]
host_ppc_defs.c
167
switch (
hregClass
(reg)) {
448
vassert(
hregClass
(reg) == HRcVec128);
[
all
...]
host_s390_defs.c
110
switch (
hregClass
(reg)) {
121
switch (
hregClass
(reg)) {
285
return hregIsVirtual(reg) &&
hregClass
(reg) == HRcInt64;
481
switch (
hregClass
(rreg)) {
488
ppHRegClass(
hregClass
(rreg));
507
switch (
hregClass
(rreg)) {
514
ppHRegClass(
hregClass
(rreg));
[
all
...]
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