| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/aarch64/ |
| ldst-reg-pair.s | 45 // a variety of values for the imm7 field
46 .irp imm7, -64, -31, -1, 0, 15, 63
49 op3_offset \op, \reg, "(\imm7*\size)"
53 op3_post_ind \op, \reg, "(\imm7*\size)"
57 op3_pre_ind \op, \reg, "(\imm7*\size)"
|
| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/arm/ |
| maverick.c | 124 imm7 (func_arg *arg, insn_data *data) function
125 #define imm7 { imm7 } macro
205 signed immediate generated with imm7. */
208 mvreg (reg1name, 12), comma, mvreg (reg2name, 16), comma, imm7, \
|
| /external/v8/src/arm64/ |
| assembler-arm64-inl.h | 1121 Instr Assembler::ImmLSPair(int imm7, LSDataSize size) {
1122 DCHECK(((imm7 >> size) << size) == imm7);
1123 int scaled_imm7 = imm7 >> size;
1147 Instr Assembler::ImmHint(int imm7) {
1148 DCHECK(is_uint7(imm7));
1149 return imm7 << ImmHint_offset;
[all...] |
| assembler-arm64.h | [all...] |
| /prebuilts/go/darwin-x86/src/cmd/vendor/golang.org/x/arch/arm64/arm64asm/ |
| decode.go | 242 imm7 := (x >> 15) & (1<<7 - 1)
243 return MemImmediate{Rn, AddrOffset, ((int32(imm7 << 2)) << 23) >> 23}
247 imm7 := (x >> 15) & (1<<7 - 1)
248 return MemImmediate{Rn, AddrOffset, ((int32(imm7 << 3)) << 22) >> 22}
257 imm7 := (x >> 15) & (1<<7 - 1)
258 return MemImmediate{Rn, AddrPostIndex, ((int32(imm7 << 2)) << 23) >> 23}
262 imm7 := (x >> 15) & (1<<7 - 1)
263 return MemImmediate{Rn, AddrPostIndex, ((int32(imm7 << 3)) << 22) >> 22}
272 imm7 := (x >> 15) & (1<<7 - 1)
273 return MemImmediate{Rn, AddrPreIndex, ((int32(imm7 << 2)) << 23) >> 23
[all...] |
| arg.go | 56 // in the "imm7" field times 8
69 // in the "imm7" field times 4
|
| /prebuilts/go/linux-x86/src/cmd/vendor/golang.org/x/arch/arm64/arm64asm/ |
| decode.go | 242 imm7 := (x >> 15) & (1<<7 - 1)
243 return MemImmediate{Rn, AddrOffset, ((int32(imm7 << 2)) << 23) >> 23}
247 imm7 := (x >> 15) & (1<<7 - 1)
248 return MemImmediate{Rn, AddrOffset, ((int32(imm7 << 3)) << 22) >> 22}
257 imm7 := (x >> 15) & (1<<7 - 1)
258 return MemImmediate{Rn, AddrPostIndex, ((int32(imm7 << 2)) << 23) >> 23}
262 imm7 := (x >> 15) & (1<<7 - 1)
263 return MemImmediate{Rn, AddrPostIndex, ((int32(imm7 << 3)) << 22) >> 22}
272 imm7 := (x >> 15) & (1<<7 - 1)
273 return MemImmediate{Rn, AddrPreIndex, ((int32(imm7 << 2)) << 23) >> 23
[all...] |
| arg.go | 56 // in the "imm7" field times 8
69 // in the "imm7" field times 4
|
| /external/llvm/lib/Target/Sparc/Disassembler/ |
| SparcDisassembler.cpp | 644 unsigned imm7 = 0; local
646 imm7 = fieldFromInstruction(insn, 0, 7);
655 // Decode RS1 | IMM7.
657 MI.addOperand(MCOperand::createImm(imm7));
|
| /toolchain/binutils/binutils-2.27/include/opcode/ |
| nds32.h | 111 #define N16_TYPE37(op4, rt3, ls, imm7) \
113 | __MF (imm7, 0, 7) | __MF (ls, 7, 1))
|
| /toolchain/binutils/binutils-2.27/gas/config/ |
| bfin-parse.y | 214 #define imm7(x) EXPR_VALUE (x)
241 if (imm7 (reg2) != reg1->regno - 1)
[all...] |
| /external/vixl/tools/ |
| generate_tests.py | 656 'test/aarch32/config/cond-sp-sp-operand-imm7-t32.json',
|
| /external/vixl/src/aarch64/ |
| assembler-aarch64.h | [all...] |
| /toolchain/binutils/binutils-2.27/opcodes/ |
| bfin-dis.c | 94 { "imm7", 7, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0},
470 #define imm7(x) fmtconst (c_imm7, x, 0, outf) macro
[all...] |
| /external/valgrind/VEX/priv/ |
| guest_arm64_toIR.c | 7180 UInt imm7 = INSN(11,5); local
[all...] |
