| /external/mesa3d/src/intel/blorp/ |
| blorp.c | 34 struct isl_device *isl_dev)
37 blorp->isl_dev = isl_dev;
87 if (blorp->isl_dev->info->gen < 8)
135 if (is_render_target && blorp->isl_dev->info->gen == 6)
|
| blorp.h | 45 const struct isl_device *isl_dev; member in struct:blorp_context
68 struct isl_device *isl_dev);
|
| blorp_blit.c | 2344 const struct isl_device *isl_dev = batch->blorp->isl_dev; local
[all...] |
| blorp_genX_exec.h | 430 batch->blorp->isl_dev->info->max_vs_threads - 1;
665 batch->blorp->isl_dev->info->max_wm_threads - 1;
713 batch->blorp->isl_dev->info->max_wm_threads - 1;
1047 const struct isl_device *isl_dev = batch->blorp->isl_dev; local
1122 const struct isl_device *isl_dev = batch->blorp->isl_dev; local
[all...] |
| blorp_clear.c | 319 get_fast_clear_rect(batch->blorp->isl_dev, surf->aux_surf,
669 assert(ISL_DEV_GEN(batch->blorp->isl_dev) >= 8 ||
689 if (ISL_DEV_GEN(batch->blorp->isl_dev) >= 9) {
692 } else if (ISL_DEV_GEN(batch->blorp->isl_dev) >= 8) {
705 if (batch->blorp->isl_dev->info->gen >= 9) {
|
| /external/mesa3d/src/intel/vulkan/ |
| anv_image.c | 159 ok = isl_surf_init(&dev->isl_dev, &anv_surf->isl,
217 isl_surf_get_hiz_surf(&dev->isl_dev, &image->depth_surface.isl,
225 ok = isl_surf_get_ccs_surf(&dev->isl_dev, &anv_surf->isl,
581 isl_surf_fill_state(&device->isl_dev,
606 isl_surf_fill_state(&device->isl_dev,
620 isl_surf_fill_image_param(&device->isl_dev,
711 isl_buffer_fill_image_param(&device->isl_dev,
|
| genX_cmd_buffer.c | 160 const struct isl_device *isl_dev = &cmd_buffer->device->isl_dev; local
163 state.offset + isl_dev->ss.addr_offset, bo, offset);
172 const struct isl_device *isl_dev = &cmd_buffer->device->isl_dev; local
175 state.offset + isl_dev->ss.addr_offset,
186 uint32_t *aux_addr_dw = state.map + isl_dev->ss.aux_addr_offset;
190 state.offset + isl_dev->ss.aux_addr_offset,
402 const struct isl_device *isl_dev = &cmd_buffer->device->isl_dev; local
[all...] |
| anv_batch_chain.c | 625 struct isl_device *isl_dev = &cmd_buffer->device->isl_dev; local
627 isl_dev->ss.size, isl_dev->ss.align);
[all...] |
| anv_device.c | 216 isl_device_init(&device->isl_dev, &device->info, swizzled);
513 isl_device_get_sample_counts(&pdevice->isl_dev);
[all...] |
| anv_blorp.c | 88 blorp_init(&device->blorp, device, &device->isl_dev);
153 isl_surf_init(&device->isl_dev, isl_surf,
548 isl_surf_init(&device->isl_dev, &surf,
[all...] |
| anv_formats.c | 534 sampleCounts = isl_device_get_sample_counts(&physical_device->isl_dev);
|
| anv_private.h | 516 struct isl_device isl_dev; member in struct:anv_physical_device
581 struct isl_device isl_dev; member in struct:anv_device
[all...] |
| /external/mesa3d/src/mesa/drivers/dri/i965/ |
| brw_wm_surface_state.c | 160 brw->isl_dev.ss.size,
161 brw->isl_dev.ss.align,
164 isl_surf_fill_state(&brw->isl_dev, state, .surf = &surf, .view = &view,
172 *surf_offset + brw->isl_dev.ss.addr_offset,
184 uint32_t *aux_addr = state + brw->isl_dev.ss.aux_addr_offset;
186 *surf_offset + brw->isl_dev.ss.aux_addr_offset,
659 brw->isl_dev.ss.size,
660 brw->isl_dev.ss.align,
663 isl_buffer_fill_state(&brw->isl_dev, dw,
672 *out_offset + brw->isl_dev.ss.addr_offset
[all...] |
| brw_blorp.c | 68 blorp_init(&brw->blorp, brw, &brw->isl_dev);
[all...] |
| brw_context.h | 809 struct isl_device isl_dev; member in struct:brw_context
[all...] |
| intel_blit.c | 192 isl_tiling_get_intratile_offset_el(&brw->isl_dev,
[all...] |
| intel_mipmap_tree.c | [all...] |
| brw_context.c | [all...] |
