| /external/vixl/examples/aarch64/ |
| neon-matrix-multiply.cc | 49 VRegister v_in = VRegister(in_column, kSRegSize);
|
| /external/vixl/src/aarch64/ |
| logic-aarch64.cc | [all...] |
| instructions-aarch64.h | 67 const unsigned kSRegSize = 32;
69 const unsigned kSRegSizeInBytes = kSRegSize / 8;
|
| operands-aarch64.h | 151 (size_ == kSRegSize) || (size_ == kDRegSize) ||
397 bool IsLaneSizeS() const { return GetLaneSizeInBits() == kSRegSize; }
456 const VRegister s##N(N, kSRegSize); \
|
| instructions-aarch64.cc | 548 return kSRegSize;
|
| macro-assembler-aarch64.h | 828 // parameter. Only kXRegSize, kWRegSize, kDRegSize and kSRegSize are
857 PushSizeRegList(regs, kSRegSize, CPURegister::kVRegister);
860 PopSizeRegList(regs, kSRegSize, CPURegister::kVRegister);
883 // parameter. Only kXRegSize, kWRegSize, kDRegSize and kSRegSize are
[all...] |
| disasm-aarch64.cc | [all...] |
| assembler-aarch64.cc | [all...] |
| simulator-aarch64.h | [all...] |
| /external/v8/src/arm64/ |
| simulator-arm64.h | 453 if (sizeof(value) <= kSRegSize) {
480 DCHECK((sizeof(value) == kDRegSize) || (sizeof(value) == kSRegSize));
541 kPrintSRegValue = 1 << kSRegSize,
|
| simulator-arm64.cc | [all...] |
| constants-arm64.h | 55 const int kSRegSize = kSRegSizeInBits >> 3;
[all...] |
| /external/vixl/test/aarch64/ |
| test-simulator-aarch64.cc | 203 VIXL_ASSERT((d_size == kDRegSize) || (d_size == kSRegSize));
204 VIXL_ASSERT((n_size == kDRegSize) || (n_size == kSRegSize));
323 VIXL_ASSERT((reg_size == kDRegSize) || (reg_size == kSRegSize));
456 VIXL_ASSERT((reg_size == kDRegSize) || (reg_size == kSRegSize));
605 VIXL_ASSERT((reg_size == kDRegSize) || (reg_size == kSRegSize));
744 VIXL_ASSERT((reg_size == kDRegSize) || (reg_size == kSRegSize));
872 VIXL_ASSERT((n_size == kDRegSize) || (n_size == kSRegSize));
924 VIXL_ASSERT((n_size == kDRegSize) || (n_size == kSRegSize));
[all...] |
| test-utils-aarch64.cc | 322 s[i] = FPRegister(n, kSRegSize);
|
| test-assembler-aarch64.cc | [all...] |
