| /external/gemmlowp/meta/generators/ |
| zip_Nx8_neon.py | 28 """Prepares read lanes for the zip operation.
33 zip_lanes: number of lanes to prepare.
40 lanes = []
44 lanes.append(ZipLane(input_address, registers.DoubleRegister(),
48 lanes.append(ZipLane(address_register, registers.DoubleRegister(),
52 return lanes
64 def GenerateClearAggregators(emitter, lanes):
65 for lane in lanes:
69 def GenerateLoadAggregateStore(emitter, lanes, output_address, alignment):
70 """Emit inner loop code for reading N lanes and interweaving them.""
[all...] |
| qnt_Nx8_neon.py | 26 def BuildName(lanes, leftovers, aligned):
27 name = 'qnt_%dx8' % lanes
35 def LoadAndDuplicateOffsets(emitter, registers, lanes, offsets):
36 if lanes == 1 or lanes == 2 or lanes == 3:
38 for unused_i in range(0, lanes):
46 raise ConfigurationError('Unsupported number of lanes: %d' % lanes)
51 """Prepare lanes for reading unquantized multiplication results.""
[all...] |
| mul_Nx8_Mx8_neon.py | 22 self.lanes = []
25 self.lanes.append(lane)
28 for i in range(0, len(self.lanes)):
29 registers.FreeRegister(self.lanes[i])
30 self.lanes[i] = None
34 lanes = MulLanes(address)
36 lanes.AddLane(registers.DoubleRegister())
37 return lanes
41 lanes = MulLanes(address)
42 lanes.AddLane(registers.Low(quad_register)
[all...] |
| mul_1x8_Mx8_neon.py | 17 emitter.EmitComment('General 1xM lanes loop.')
197 def BuildName(result_type, lhs_add, rhs_add, lanes):
198 name = 'mul_1x8_%dx8_%s' % (lanes, result_type)
243 raise ConfigurationError('Lanes should be: 1, 2, 3 or 4.')
279 for lanes in range(1, 5):
280 GenerateMul1x8Mx8(emitter, result_type, lhs_add, rhs_add, lanes)
|
| neon_emitter_64.py | 191 lanes = list(set([register.lane for register in registers]))
192 if len(lanes) > 1:
193 raise ArgumentError('Cannot mix lanes on a register list.')
196 if lanes[0] is None:
198 elif lanes[0] is -1:
205 return '{%s}[%d]' % (', '.join(map(str, typed_registers_nolane)), lanes[0])
[all...] |
| /external/gemmlowp/meta/ |
| test_streams_correctness.cc | 105 template <int lanes, int leftover>
116 prepare_row_major_data(lanes, all_elements, stride, in);
117 Stream<std::uint8_t, lanes, 8, leftover, RowMajorWithSum>::Pack(in, params,
119 if (check(out, lanes, all_elements)) {
120 // std::cout << "Row: " << lanes << "x8x" << leftover << " : "
124 std::cout << "Row: " << lanes << "x8x" << leftover << " : "
131 for (int stride = lanes; stride < lanes + 4; ++stride) {
138 prepare_column_major_data(lanes, all_elements, stride, in);
139 Stream<std::uint8_t, lanes, 8, leftover, ColumnMajorWithSum>::Pack(in, params
[all...] |
| base.h | 97 static int Scratch(const StreamType& params, int lanes);
|
| /external/trappy/trappy/plotter/ |
| EventPlot.py | 78 :param num_lanes: Total number of expected lanes
90 :param lanes: The sorted order of lanes
91 :type lanes: list
122 lanes=None,
134 graph["lanes"] = self._get_lanes(lanes, lane_prefix, num_lanes, _data)
148 """Group data by lanes.
151 occuring simultaneously in different lanes.
185 """Populate the lanes for the plot""
[all...] |
| /external/mesa3d/src/gallium/drivers/nouveau/codegen/ |
| nv50_ir_lowering_gm107.cpp | 120 // mov coordinates from lane l to all lanes
126 add->lanes = 1; /* abused for .ndv */
129 // add dPdx from lane l to lanes dx
134 add->lanes = 1; /* abused for .ndv */
137 // add dPdy from lane l to lanes dy
142 add->lanes = 1; /* abused for .ndv */
172 mov->lanes = 1 << l;
211 insn->lanes = 0; /* abused for !.ndv */
|
| nv50_ir.cpp | 579 lanes = 0xf;
763 i->lanes = lanes;
|
| nv50_ir_emit_nv50.cpp | 633 code[1] = 0x00200000 | (i->lanes << 14);
650 code[1] = 0x00200000 | (i->lanes << 14);
791 code[1] |= (i->lanes << 14);
[all...] |
| nv50_ir_emit_gk110.cpp | [all...] |
| nv50_ir.h | 874 unsigned lanes : 4;
[all...] |
| nv50_ir_build_util.cpp | 268 quadop->lanes = l;
|
| nv50_ir_emit_gm107.cpp | 722 emitField(0x27, 4, insn->lanes);
726 emitField(0x0c, 4, insn->lanes);
[all...] |
| nv50_ir_emit_nvc0.cpp | [all...] |
| nv50_ir_lowering_nv50.cpp | 828 // The lanes of a quad are grouped by the bit in the condition register they
963 // mov coordinates from lane l to all lanes
966 // add dPdx from lane l to lanes dx
969 // add dPdy from lane l to lanes dy
996 mov->lanes = 1 << l;
[all...] |
| /external/tensorflow/tensorflow/python/client/ |
| timeline.py | 400 """Assigns non-overlapping lanes for the activities on each device."""
403 lanes = [0]
406 for (i, lts) in enumerate(lanes):
409 lanes[l] = ns.all_start_micros + ns.all_end_rel_micros
412 l = len(lanes)
413 lanes.append(ns.all_start_micros + ns.all_end_rel_micros)
|
| /external/trappy/trappy/plotter/js/ |
| EventPlot.js | 90 itemRects, items, colourAxis, tip, lanes;
94 lanes = d.lanes;
106 mainHeight = 50 * lanes.length - margin.top - margin.bottom;
135 ext = d3.extent(lanes, function (d) {
174 .data(lanes)
192 .data(lanes)
241 lanes: lanes,
715 var miniHeight = ePlot.lanes.length * 12 + 50
[all...] |
| /external/tensorflow/tensorflow/core/profiler/internal/ |
| tfprof_timeline.cc | 349 for (int64 i = 0; i < p->lanes.size(); ++i) {
350 const auto& lane = p->lanes[i];
366 l = p->lanes.size();
369 p->lanes.push_back(nlane);
371 p->lanes[l][start_time] = end_time;
|
| tfprof_timeline.h | 69 std::vector<std::map<int64, int64>> lanes; member in class:tensorflow::tfprof::Process
|
| /external/libhevc/common/arm/ |
| ihevc_intra_pred_luma_dc.s | 215 vdup.16 q12, d11[0] @3*dc + 2 (moved to all lanes)
456 vdup.16 q12, d11[0] @3*dc + 2 (moved to all lanes)
|
| /external/vixl/src/aarch64/ |
| operands-aarch64.h | 198 // described. They do not consider the number of lanes that make up a vector.
201 // Check the number of lanes, ie. the format of the vector, using methods such
310 VRegister(unsigned code, unsigned size, unsigned lanes = 1)
311 : CPURegister(code, size, kVRegister), lanes_(lanes) {
379 // For consistency, we assert the number of lanes of these scalar registers,
401 VIXL_DEPRECATED("GetLanes", int lanes() const) { return GetLanes(); }
|
| logic-aarch64.cc | 1384 int lanes = LaneCountFromFormat(vform); local
1564 int lanes = LaneCountFromFormat(vform); local
[all...] |
| /external/v8/src/arm/ |
| macro-assembler-arm.cc | [all...] |
