| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/mips/ |
| mips32@isa-override-2.l | 2 .*:5: Error: opcode not supported on this processor: mips32 \(mips32\) `dli \$2,0x9000000080000000'
3 .*:10: Error: opcode not supported on this processor: mips32 \(mips32\) `dli \$2,0x9000000080000000'
4 .*:13: Error: opcode not supported on this processor: mips32 \(mips32\) `dli \$2,0x9000000080000000'
|
| cp0sel-names-mips32.d | 1 #objdump: -dr --prefix-addresses --show-raw-insn -mmips:isa32 -M gpr-names=numeric,cp0-names=mips32
2 #name: MIPS CP0 with sel register disassembly (mips32)
3 #as: -32 -march=mips32
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| cp0-names-mips32.d | 1 #objdump: -dr --prefix-addresses --show-raw-insn -M gpr-names=numeric,cp0-names=mips32
2 #name: MIPS CP0 register disassembly (mips32)
|
| cp1-names-mips32.d | 1 #objdump: -dr --prefix-addresses --show-raw-insn -M gpr-names=numeric,cp1-names=mips32
2 #name: MIPS CP1 register disassembly (mips32)
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| jalr.s | 9 .set mips32
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| elf_arch_mips32.d | 1 # name: ELF MIPS32 markings
4 # as: -32 -march=mips32
7 private flags = 5.......: .*\[mips32\].*
11 ISA: MIPS32
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| cp0sel-names-mips32r2.d | 3 #as: -32 -march=mips32
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| cp0sel-names-mips64.d | 3 #as: -32 -march=mips32
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| cp0sel-names-mips64r2.d | 3 #as: -32 -march=mips32
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| cp0sel-names-numeric.d | 3 #as: -32 -march=mips32
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| cp0sel-names-sb1.d | 3 #as: -32 -march=mips32
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| mips16e-jrc.d | 2 #as: -march=mips32 -mips16 -32
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| /external/valgrind/VEX/auxprogs/ |
| genoffsets.c | 193 // MIPS32
194 GENOFFSET(MIPS32,mips32,r0);
195 GENOFFSET(MIPS32,mips32,r1);
196 GENOFFSET(MIPS32,mips32,r2);
197 GENOFFSET(MIPS32,mips32,r3);
198 GENOFFSET(MIPS32,mips32,r4)
[all...] |
| /external/llvm/test/MC/Mips/ |
| set-mips-directives.s | 16 .set mips32
20 .set mips32
23 .set mips32
52 # CHECK: .set mips32
56 # CHECK: .set mips32
59 # CHECK: .set mips32
|
| elf_eflags_nan2008.s | 1 # RUN: llvm-mc -filetype=obj -triple mipsel-unknown-linux -mcpu=mips32 %s -o - | \
4 # RUN: llvm-mc -triple mipsel-unknown-linux -mcpu=mips32 %s -o -| \
|
| llvm-mc-fixup-endianness.s | 1 # RUN: llvm-mc -show-encoding -mcpu=mips32 -triple mips-unknown-unknown %s | FileCheck -check-prefix=BE %s
2 # RUN: llvm-mc -show-encoding -mcpu=mips32 -triple mipsel-unknown-unknown %s | FileCheck -check-prefix=LE %s
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| cprestore-warning-unused.s | 1 # RUN: llvm-mc %s -arch=mips -mcpu=mips32 --position-independent 2>%t1
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| elf_eflags_abicalls.s | 1 # RUN: llvm-mc -filetype=obj -triple mipsel-unknown-linux -mcpu=mips32 %s -o -| llvm-readobj -h | FileCheck %s
|
| elf_eflags_micromips.s | 1 # RUN: llvm-mc -filetype=obj -triple mipsel-unknown-linux -mcpu=mips32 \
4 # RUN: llvm-mc -filetype=obj -triple mipsel-unknown-linux -mcpu=mips32 %s -o - \
|
| elf_eflags_noreorder.s | 1 # RUN: llvm-mc -filetype=obj -triple mipsel-unknown-linux -mcpu=mips32 %s -o -| llvm-readobj -h | FileCheck %s
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| elf_eflags_pic0.s | 1 # RUN: llvm-mc -filetype=obj -triple mipsel-unknown-linux -mcpu=mips32 %s -o -| llvm-readobj -h | FileCheck %s
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| elf_eflags_pic2.s | 1 # RUN: llvm-mc -filetype=obj -triple mipsel-unknown-linux -mcpu=mips32 %s -o -| llvm-readobj -h | FileCheck %s
|
| /external/libvpx/ |
| generate_config.sh | 230 gen_config_files mips32 "--target=mips32-linux-gcc --disable-dspr2 --disable-msa ${all_platforms}"
231 gen_config_files mips32-dspr2 "--target=mips32-linux-gcc --enable-dspr2 ${all_platforms}"
232 gen_config_files mips32-msa "--target=mips32-linux-gcc --enable-msa ${all_platforms}"
247 lint_config mips32
248 lint_config mips32-dspr2
249 lint_config mips32-msa
265 gen_rtcd_header mips32 mips3
[all...] |
| /external/valgrind/memcheck/tests/vbit-test/ |
| irops.c | 39 { DEFOP(Iop_Add8, UNDEF_LEFT), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 0, .ppc64 = 1, .ppc32 = 1, .mips32 = 1, .mips64 = 1 },
40 { DEFOP(Iop_Add16, UNDEF_LEFT), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 0, .ppc64 = 1, .ppc32 = 1, .mips32 = 1, .mips64 = 1 },
41 { DEFOP(Iop_Add32, UNDEF_LEFT), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 1, .ppc64 = 1, .ppc32 = 1, .mips32 = 1, .mips64 = 1 },
42 { DEFOP(Iop_Add64, UNDEF_LEFT), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 1, .ppc64 = 1, .ppc32 = 1, .mips32 = 0, .mips64 = 1 }, // mips asserts
43 { DEFOP(Iop_Sub8, UNDEF_LEFT), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 0, .ppc64 = 1, .ppc32 = 1, .mips32 = 1, .mips64 = 1 },
44 { DEFOP(Iop_Sub16, UNDEF_LEFT), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 1, .mips64 = 1 },
45 { DEFOP(Iop_Sub32, UNDEF_LEFT), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 1, .ppc64 = 1, .ppc32 = 1, .mips32 = 1, .mips64 = 1 },
46 { DEFOP(Iop_Sub64, UNDEF_LEFT), .s390x = 1, .amd64 = 1, .x86 = 1, .arm = 1, .ppc64 = 1, .ppc32 = 0, .mips32 = 0, .mips64 = 1 }, // ppc32, mips assert
47 { DEFOP(Iop_Mul8, UNDEF_LEFT), .s390x = 0, .amd64 = 0, .x86 = 0, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 0 },
48 { DEFOP(Iop_Mul16, UNDEF_LEFT), .s390x = 0, .amd64 = 1, .x86 = 1, .arm = 0, .ppc64 = 0, .ppc32 = 0, .mips32 = 0, .mips64 = 0 }
[all...] |
| /external/llvm/test/MC/Mips/mips32r5/ |
| invalid-mips32.s | 3 # RUN: not llvm-mc %s -triple=mips-unknown-linux -show-encoding -mcpu=mips32 \
|
