| /external/capstone/suite/MC/Mips/ |
| micromips-multiply-instructions-EB.s.cs | 4 0x00,0xa4,0xeb,0x3c = msub $4, $5
|
| micromips-multiply-instructions.s.cs | 4 0xa4,0x00,0x3c,0xeb = msub $4, $5
|
| mips-dsp-instructions.s.cs | 28 0x71,0x4b,0x18,0x04 = msub $ac3, $10, $11
38 0x71,0x4b,0x00,0x04 = msub $10, $11
|
| mips64-alu-instructions.s.cs | 42 0x04,0x00,0xc7,0x70 = msub $6, $7
|
| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/mips/ |
| mips4010.s | 12 msub $8,$9
|
| mips4010.d | 16 0+001c <stuff\+0x1c> msub t0,t1
|
| set-arch.s | 15 msub $8,$9
63 msub.d $f0,$f2,$f4,$f6
64 msub.s $f0,$f2,$f4,$f6
134 msub.ps $f30, $f0, $f2, $f4
159 msub $9, $10
|
| mips4-fp.s | 24 msub.d $f0,$f2,$f4,$f6
25 msub.s $f0,$f2,$f4,$f6
|
| mips4-fp.d | 31 [0-9a-f]+ <[^>]*> msub.d \$f0,\$f2,\$f4,\$f6
32 [0-9a-f]+ <[^>]*> msub.s \$f0,\$f2,\$f4,\$f6
|
| mips32.d | 14 0+0010 <[^>]*> 712a0004 msub t1,t2
|
| micromips@mips4-fp.d | 36 [0-9a-f]+ <[^>]*> 54c4 00a9 msub\.d \$f0,\$f2,\$f4,\$f6
37 [0-9a-f]+ <[^>]*> 54c4 00a1 msub\.s \$f0,\$f2,\$f4,\$f6
|
| mips32.s | 16 msub $9, $10
|
| loongson-2e.s | 27 msub.s $f9, $f10, $f11
28 msub.d $f12, $f13, $f14
29 msub.ps $f15, $f16, $f17
|
| loongson-2f.s | 27 msub.s $f9, $f10, $f11
28 msub.d $f12, $f13, $f14
29 msub.ps $f15, $f16, $f17
|
| mips32-dspr2.s | 27 msub $ac0,$13,$14
|
| micromips@mips32.d | 15 [0-9a-f]+ <[^>]*> 0149 eb3c msub t1,t2
|
| /external/llvm/test/MC/Mips/ |
| micromips-multiply-instructions.s | 14 # CHECK-EL: msub $4, $5 # encoding: [0xa4,0x00,0x3c,0xeb]
21 # CHECK-EB: msub $4, $5 # encoding: [0x00,0xa4,0xeb,0x3c]
25 msub $4, $5
|
| /external/llvm/test/MC/Mips/mips32r6/ |
| invalid-mips32r2.s | 10 msub.d $f10,$f1,$f31,$f18 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
11 msub.s $f12,$f19,$f10,$f16 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
|
| /external/valgrind/none/tests/mips64/ |
| fpu_arithmetic.stdout.exp | [all...] |
| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/aarch64/ |
| no-aliases.d | 18 24: 9b028c20 msub x0, x1, x2, x3
19 28: 9b02fc20 msub x0, x1, x2, xzr
20 2c: 9b02fc20 msub x0, x1, x2, xzr
|
| alias.s | 35 msub x0, x1, x2, x3
36 msub x0, x1, x2, xzr
|
| /device/linaro/bootloader/arm-trusted-firmware/common/aarch64/ |
| debug.S | 40 msub x4, x0, x5, x4 /* Find the remainder */
|
| /device/linaro/bootloader/arm-trusted-firmware/plat/mediatek/common/drivers/uart/ |
| 8250_console.S | 62 msub w1, w3, w2, w1 /* remainder = uartclk % (quot * baudrate) */
|
| /external/llvm/test/MC/Mips/mips32/ |
| invalid-mips32r2.s | 20 msub.d $f10,$f1,$f31,$f18 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
21 msub.s $f12,$f19,$f10,$f16 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
|
| /external/llvm/test/MC/Mips/mips5/ |
| invalid-mips64.s | 21 msub $s7,$k1 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
|
