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  /toolchain/binutils/binutils-2.27/gas/testsuite/gas/arm/
neon-suffix-bad.l 2 [^:]*:3: Error: invalid neon suffix for non neon instruction
3 [^:]*:4: Error: invalid neon suffix for non neon instruction
4 [^:]*:5: Error: invalid neon suffix for non neon instruction
6 [^:]*:9: Error: invalid neon suffix for non neon instruction
7 [^:]*:10: Error: invalid neon suffix for non neon instructio
    [all...]
neon-suffix-bad.d 1 # name: Bad suffix for non-Neon mnemonic
2 # as: -mfpu=neon
3 # error-output: neon-suffix-bad.l
neon-vmov-bad.d 2 # as: -mfpu=neon
3 # error-output: neon-vmov-bad.l
neon-addressing-bad.d 1 # name: Bad operand in Advanced SIMD Neon instructions
2 # as: -mfpu=neon
3 # error-output: neon-addressing-bad.l
neon-cond-bad.d 1 # name: Illegal conditions in Neon instructions, ARM mode
2 # as: -mfpu=neon -I$srcdir/$subdir
3 # error-output: neon-cond-bad.l
neon-ldst-align-bad.d 1 # name: Bad alignment in Advanced SIMD Neon instructions
2 # as: -mfpu=neon
3 # error-output: neon-ldst-align-bad.l
neon-ldst-es-bad.d 1 # name: Bad element size combinations in Neon load/store instructions
2 # as: -mfpu=neon
3 # error-output: neon-ldst-es-bad.l
attr-mfpu-neon.d 1 # name: attributes for -mfpu=neon
3 # as: -mfpu=neon
half-prec-neon.d 2 #name: Half-precision neon instructions
3 #as: -mfpu=neon-fp16
simd_by_scalar_low_regbank.d 3 #as: -march=armv8.2-a+fp16 -mfpu=neon-fp-armv8
simd_by_scalar_low_regbank_thumb.d 3 #as: -march=armv8.2-a+fp16 -mfpu=neon-fp-armv8 -mthumb
attr-mfpu-neon-fp16.d 1 # name: attributes for -mfpu=neon-fp16
3 # as: -mfpu=neon-fp16
  /external/libvpx/libvpx/vpx_dsp/
vpx_dsp_rtcd_defs.pl 44 specialize qw/vpx_d45_predictor_4x4 neon sse2/;
54 specialize qw/vpx_h_predictor_4x4 neon dspr2 msa sse2 vsx/;
61 specialize qw/vpx_d135_predictor_4x4 neon/;
67 specialize qw/vpx_v_predictor_4x4 neon msa sse2/;
72 specialize qw/vpx_tm_predictor_4x4 neon dspr2 msa sse2 vsx/;
75 specialize qw/vpx_dc_predictor_4x4 dspr2 msa neon sse2/;
78 specialize qw/vpx_dc_top_predictor_4x4 msa neon sse2/;
81 specialize qw/vpx_dc_left_predictor_4x4 msa neon sse2/;
84 specialize qw/vpx_dc_128_predictor_4x4 msa neon sse2/;
90 specialize qw/vpx_d45_predictor_8x8 neon sse2 vsx/
    [all...]
  /external/libvpx/libvpx/vp8/common/
rtcd_defs.pl 35 specialize qw/vp8_dequantize_b mmx neon msa mmi/;
38 specialize qw/vp8_dequant_idct_add mmx neon dspr2 msa mmi/;
41 specialize qw/vp8_dequant_idct_add_y_block sse2 neon dspr2 msa mmi/;
44 specialize qw/vp8_dequant_idct_add_uv_block sse2 neon dspr2 msa mmi/;
50 specialize qw/vp8_loop_filter_mbv sse2 neon dspr2 msa mmi/;
53 specialize qw/vp8_loop_filter_bv sse2 neon dspr2 msa mmi/;
56 specialize qw/vp8_loop_filter_mbh sse2 neon dspr2 msa mmi/;
59 specialize qw/vp8_loop_filter_bh sse2 neon dspr2 msa mmi/;
63 specialize qw/vp8_loop_filter_simple_mbv sse2 neon msa mmi/;
71 specialize qw/vp8_loop_filter_simple_mbh sse2 neon msa mmi/
    [all...]
  /device/generic/mini-emulator-armv7-a-neon/
BoardConfig.mk 6 include device/generic/armv7-a-neon/BoardConfig.mk
  /device/linaro/hikey/hikey32/
BoardConfig.mk 4 TARGET_ARCH_VARIANT := armv7-a-neon
  /external/llvm/test/MC/ARM/
directive-fpu-instrs.s 1 // RUN: llvm-mc -triple armv7-unknown-linux-gnueabi -mattr=+vfp3,-neon %s
3 .fpu neon
7 @ .thumb should not disable the prior .fpu neon
  /bionic/libc/arch-arm/cortex-a15/bionic/
memcpy.S 60 .fpu neon
  /bionic/libc/arch-arm/cortex-a53/bionic/
memcpy.S 60 .fpu neon
  /bionic/libc/arch-arm/cortex-a7/bionic/
memcpy.S 60 .fpu neon
  /bionic/libc/arch-arm/cortex-a9/bionic/
memcpy.S 33 * instructions, that supports neon instructions, and that has a 32 byte
38 .fpu neon
  /bionic/libc/arch-arm/denver/bionic/
memcpy.S 62 .fpu neon
  /bionic/libc/arch-arm/krait/bionic/
memcpy.S 29 /* Assumes neon instructions and a cache line size of 32 bytes. */
35 * instructions, that supports neon instructions, and that has a 32 byte
41 .fpu neon
  /build/make/target/board/generic_arm_a/
BoardConfig.mk 23 TARGET_ARCH_VARIANT := armv7-a-neon
  /device/google/cuttlefish/vsoc_x86/
BoardConfig.mk 32 TARGET_2ND_ARCH_VARIANT := armv7-a-neon

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