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  /toolchain/binutils/binutils-2.27/gas/testsuite/gas/sparc/
prefetch.s 2 prefetch [%g1],0
3 prefetch [%g1],31
4 prefetch [%g1],#n_reads
5 prefetch [%g1],#one_read
6 prefetch [%g1],#n_writes
7 prefetch [%g1],#one_write
prefetch.d 3 #name: sparc64 prefetch
10 0: c1 68 40 00 prefetch \[ %g1 \], #n_reads
11 4: ff 68 40 00 prefetch \[ %g1 \], 31
12 8: c1 68 40 00 prefetch \[ %g1 \], #n_reads
13 c: c3 68 40 00 prefetch \[ %g1 \], #one_read
14 10: c5 68 40 00 prefetch \[ %g1 \], #n_writes
15 14: c7 68 40 00 prefetch \[ %g1 \], #one_write
  /toolchain/binutils/binutils-2.27/gas/testsuite/gas/bfin/
cache.s 2 .global prefetch
3 prefetch: label
4 prefetch[p5];
5 PreFetch [fp++];
6 PREFETCH [SP];
cache.d 6 00000000 <prefetch>:
7 0: 45 02 PREFETCH\[P5\];
8 2: 67 02 PREFETCH\[FP\+\+\];
9 4: 46 02 PREFETCH\[SP\];
  /external/tensorflow/tensorflow/core/platform/
prefetch.h 28 // prefetch to all levels of the hierarchy (except on p4: prefetch to L2)
40 void prefetch(const void* x);
46 inline void prefetch(const void* x) { function in namespace:tensorflow::port
48 // reasons. COMPILER_GCC3 is the macro that actually enables prefetch.
  /toolchain/binutils/binutils-2.27/gas/testsuite/gas/i386/
prefetch-intel.d 2 #name: i386 prefetch (Intel disassembly)
3 #source: prefetch.s
10 \s*[a-f0-9]+: 0f 0d 00 prefetch BYTE PTR \[eax\]
13 \s*[a-f0-9]+: 0f 0d 18 prefetch BYTE PTR \[eax\]
14 \s*[a-f0-9]+: 0f 0d 20 prefetch BYTE PTR \[eax\]
15 \s*[a-f0-9]+: 0f 0d 28 prefetch BYTE PTR \[eax\]
16 \s*[a-f0-9]+: 0f 0d 30 prefetch BYTE PTR \[eax\]
17 \s*[a-f0-9]+: 0f 0d 38 prefetch BYTE PTR \[eax\]
x86-64-prefetch-intel.d 2 #name: x86-64 prefetch (Intel disassembly)
3 #source: prefetch.s
10 \s*[a-f0-9]+: 0f 0d 00 prefetch BYTE PTR \[rax\]
13 \s*[a-f0-9]+: 0f 0d 18 prefetch BYTE PTR \[rax\]
14 \s*[a-f0-9]+: 0f 0d 20 prefetch BYTE PTR \[rax\]
15 \s*[a-f0-9]+: 0f 0d 28 prefetch BYTE PTR \[rax\]
16 \s*[a-f0-9]+: 0f 0d 30 prefetch BYTE PTR \[rax\]
17 \s*[a-f0-9]+: 0f 0d 38 prefetch BYTE PTR \[rax\]
x86-64-prefetch.d 2 #name: x86-64 prefetch
3 #source: prefetch.s
10 \s*[a-f0-9]+: 0f 0d 00 prefetch \(%rax\)
13 \s*[a-f0-9]+: 0f 0d 18 prefetch \(%rax\)
14 \s*[a-f0-9]+: 0f 0d 20 prefetch \(%rax\)
15 \s*[a-f0-9]+: 0f 0d 28 prefetch \(%rax\)
16 \s*[a-f0-9]+: 0f 0d 30 prefetch \(%rax\)
17 \s*[a-f0-9]+: 0f 0d 38 prefetch \(%rax\)
prefetch.d 2 #name: i386 prefetch
9 \s*[a-f0-9]+: 0f 0d 00 prefetch \(%eax\)
12 \s*[a-f0-9]+: 0f 0d 18 prefetch \(%eax\)
13 \s*[a-f0-9]+: 0f 0d 20 prefetch \(%eax\)
14 \s*[a-f0-9]+: 0f 0d 28 prefetch \(%eax\)
15 \s*[a-f0-9]+: 0f 0d 30 prefetch \(%eax\)
16 \s*[a-f0-9]+: 0f 0d 38 prefetch \(%eax\)
  /external/clang/test/CodeGen/
pr9614.c 17 prefetch(void) { function
29 prefetch();
37 // CHECK: call void @llvm.prefetch(
45 // CHECK: declare void @llvm.prefetch(
builtins-arm64.c 38 void prefetch() { function
40 // CHECK: call {{.*}} @llvm.prefetch(i8* null, i32 1, i32 1, i32 1)
43 // CHECK: call {{.*}} @llvm.prefetch(i8* null, i32 0, i32 0, i32 1)
46 // CHECK: call {{.*}} @llvm.prefetch(i8* null, i32 0, i32 0, i32 1)
49 // CHECK: call {{.*}} @llvm.prefetch(i8* null, i32 0, i32 3, i32 0)
builtins-arm.c 77 void prefetch(int i) { function
79 // CHECK: call {{.*}} @llvm.prefetch(i8* %{{.*}}, i32 0, i32 3, i32 1)
82 // CHECK: call {{.*}} @llvm.prefetch(i8* %{{.*}}, i32 1, i32 3, i32 1)
86 // CHECK: call {{.*}} @llvm.prefetch(i8* %{{.*}}, i32 1, i32 3, i32 0)
  /external/iptables/libiptc/
linux_list.h 30 #define prefetch(x) ((void)0) macro
339 for (pos = (head)->next, prefetch(pos->next); pos != (head); \
340 pos = pos->next, prefetch(pos->next))
361 for (pos = (head)->prev, prefetch(pos->prev); pos != (head); \
362 pos = pos->prev, prefetch(pos->prev))
382 prefetch(pos->member.next); \
385 prefetch(pos->member.next))
395 prefetch(pos->member.prev); \
398 prefetch(pos->member.prev))
419 prefetch(pos->member.next);
    [all...]
  /external/libnetfilter_conntrack/include/internal/
linux_list.h 33 #define prefetch(x) 1 macro
344 for (pos = (head)->next, prefetch(pos->next); pos != (head); \
345 pos = pos->next, prefetch(pos->next))
366 for (pos = (head)->prev, prefetch(pos->prev); pos != (head); \
367 pos = pos->prev, prefetch(pos->prev))
387 prefetch(pos->member.next); \
390 prefetch(pos->member.next))
400 prefetch(pos->member.prev); \
403 prefetch(pos->member.prev))
424 prefetch(pos->member.next);
    [all...]
  /external/libnfnetlink/include/
linux_list.h 32 #define prefetch(x) 1 macro
343 for (pos = (head)->next, prefetch(pos->next); pos != (head); \
344 pos = pos->next, prefetch(pos->next))
365 for (pos = (head)->prev, prefetch(pos->prev); pos != (head); \
366 pos = pos->prev, prefetch(pos->prev))
386 prefetch(pos->member.next); \
389 prefetch(pos->member.next))
399 prefetch(pos->member.prev); \
402 prefetch(pos->member.prev))
423 prefetch(pos->member.next);
    [all...]
  /packages/apps/TV/src/com/android/tv/menu/
ChannelsRow.java 46 mChannelsPosterPrefetcher.prefetch();
52 mChannelsPosterPrefetcher.prefetch();
81 mChannelsPosterPrefetcher.prefetch();
  /toolchain/binutils/binutils-2.27/gas/testsuite/gas/mips/
micromips@mips64-cp2.s 10 # These tests use cp2 to avoid other (cp0, fpu, prefetch) opcodes.
mips64-cp2.s 10 # these tests use cp2 to avoid other (cp0, fpu, prefetch) opcodes.
  /external/tensorflow/tensorflow/contrib/data/python/kernel_tests/
prefetch_dataset_op_test.py 29 return dataset_ops.Dataset.range(100).prefetch(10).shuffle(
  /external/capstone/bindings/python/capstone/
arm64.py 29 ('prefetch', ctypes.c_int),
69 def prefetch(self): member in class:Arm64Op
70 return self.value.prefetch
  /external/tensorflow/tensorflow/python/data/kernel_tests/
prefetch_dataset_op_test.py 31 iterator = dataset_ops.Dataset.range(10).prefetch(
45 iterator = dataset_ops.Dataset.range(10).prefetch(
  /frameworks/support/v7/recyclerview/src/androidTest/java/androidx/recyclerview/widget/
RecyclerViewCacheTest.java 165 // Prefetch multiple times...
167 mRecyclerView.mGapWorker.prefetch(RecyclerView.FOREVER_NS);
202 mRecyclerView.mGapWorker.prefetch(RecyclerView.FOREVER_NS);
220 // After clearing the cache, the prefetch priorities should be cleared as well:
257 // rows 0, 1, and 2 are all attached and visible. Prefetch row 3:
259 mRecyclerView.mGapWorker.prefetch(RecyclerView.FOREVER_NS);
298 // prefetch an item, should still observe isComputingLayout in that create
300 mRecyclerView.mGapWorker.prefetch(RecyclerView.FOREVER_NS);
337 // Prefetch an item after changing orientation, before layout - shouldn't crash
339 mRecyclerView.mGapWorker.prefetch(RecyclerView.FOREVER_NS)
    [all...]
  /system/media/audio_utils/
fifo_index.cpp 129 prefetch();
133 void RefIndexCachedLoadAcquireDeferredWait::prefetch() function in class:RefIndexCachedLoadAcquireDeferredWait
  /toolchain/binutils/binutils-2.27/gas/testsuite/gas/tilepro/
t_insns.s 354 { add r15, r16, r17 ; and r5, r6, r7 ; prefetch r25 }
376 { add r15, r16, r17 ; mulhha_ss r5, r6, r7 ; prefetch r25 }
378 { add r15, r16, r17 ; mulll_ss r5, r6, r7 ; prefetch r25 }
385 { add r15, r16, r17 ; prefetch r25 ; mulhha_uu r5, r6, r7 }
386 { add r15, r16, r17 ; prefetch r25 ; seqi r5, r6, 5 }
387 { add r15, r16, r17 ; prefetch r25 }
397 { add r15, r16, r17 ; shl r5, r6, r7 ; prefetch r25 }
401 { add r15, r16, r17 ; slte_u r5, r6, r7 ; prefetch r25 }
403 { add r15, r16, r17 ; sne r5, r6, r7 ; prefetch r25 }
427 { add r5, r6, r7 ; move r15, r16 ; prefetch r25
    [all...]
  /external/llvm/test/MC/X86/
3DNow.s 73 // CHECK: prefetch (%rax) # encoding: [0x0f,0x0d,0x00]
75 prefetch (%rax) label

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