/device/linaro/bootloader/arm-trusted-firmware/include/drivers/synopsys/ |
dw_mmc.h | 11 uintptr_t reg_base; member in struct:dw_mmc_params
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/device/linaro/bootloader/arm-trusted-firmware/drivers/synopsys/emmc/ |
dw_mmc.c | 141 mmio_write_32(dw_params.reg_base + DWMMC_CMD, 145 data = mmio_read_32(dw_params.reg_base + DWMMC_CMD); 148 data = mmio_read_32(dw_params.reg_base + DWMMC_RINTSTS); 169 data = mmio_read_32(dw_params.reg_base + DWMMC_STATUS); 173 mmio_write_32(dw_params.reg_base + DWMMC_CLKENA, 0); 176 mmio_write_32(dw_params.reg_base + DWMMC_CLKDIV, div); 180 mmio_write_32(dw_params.reg_base + DWMMC_CLKENA, 1); 181 mmio_write_32(dw_params.reg_base + DWMMC_CLKSRC, 0); 190 assert((dw_params.reg_base & EMMC_BLOCK_MASK) == 0); 192 base = dw_params.reg_base; [all...] |
/device/linaro/bootloader/arm-trusted-firmware/plat/socionext/uniphier/ |
uniphier_nand.c | 51 uintptr_t reg_base; member in struct:uniphier_nand 87 mmio_write_32(nand->reg_base + DENALI_ECC_ENABLE, 0); 89 mmio_write_32(nand->reg_base + DENALI_INTR_STATUS0, -1); 102 status = mmio_read_32(nand->reg_base + DENALI_INTR_STATUS0); 124 mmio_write_32(nand->reg_base + DENALI_ECC_ENABLE, 1); 125 mmio_write_32(nand->reg_base + DENALI_DMA_ENABLE, 1); 127 mmio_write_32(nand->reg_base + DENALI_INTR_STATUS0, -1); 147 status = mmio_read_32(nand->reg_base + DENALI_INTR_STATUS0); 150 mmio_write_32(nand->reg_base + DENALI_DMA_ENABLE, 0); 245 nand->reg_base = 0x68100000 [all...] |
/external/libffi/src/avr32/ |
ffi.c | 72 char *reg_base = stack; local 82 *(void**)reg_base = ecif->rvalue; 111 addr = reg_base + (index * 4); 118 addr = reg_base + 4; 123 addr = reg_base + 12; 166 printf("r%d: 0x%08x\n", 12 - i, ((unsigned int*)reg_base)[i]); 275 register char *reg_base = stack; local 290 *rvalue = *(void **)reg_base; 320 *p_argv = (void*)reg_base + (index * 4); 327 *p_argv = (void*)reg_base + 4 [all...] |
/external/python/cpython2/Modules/_ctypes/libffi/src/avr32/ |
ffi.c | 72 char *reg_base = stack; local 82 *(void**)reg_base = ecif->rvalue; 111 addr = reg_base + (index * 4); 118 addr = reg_base + 4; 123 addr = reg_base + 12; 166 printf("r%d: 0x%08x\n", 12 - i, ((unsigned int*)reg_base)[i]); 275 register char *reg_base = stack; local 290 *rvalue = *(void **)reg_base; 320 *p_argv = (void*)reg_base + (index * 4); 327 *p_argv = (void*)reg_base + 4 [all...] |
/external/python/cpython3/Modules/_ctypes/libffi/src/avr32/ |
ffi.c | 72 char *reg_base = stack; local 82 *(void**)reg_base = ecif->rvalue; 111 addr = reg_base + (index * 4); 118 addr = reg_base + 4; 123 addr = reg_base + 12; 166 printf("r%d: 0x%08x\n", 12 - i, ((unsigned int*)reg_base)[i]); 275 register char *reg_base = stack; local 290 *rvalue = *(void **)reg_base; 320 *p_argv = (void*)reg_base + (index * 4); 327 *p_argv = (void*)reg_base + 4 [all...] |
/device/linaro/bootloader/arm-trusted-firmware/drivers/ufs/ |
ufs.c | 57 assert((ufs_params.reg_base != 0) && (val != NULL)); 59 base = ufs_params.reg_base; 92 assert((ufs_params.reg_base != 0)); 94 base = ufs_params.reg_base; 159 data = mmio_read_32(ufs_params.reg_base + UTRLDBR); 219 mmio_write_32(ufs_params.reg_base + UTRLBA, 221 mmio_write_32(ufs_params.reg_base + UTRLBAU, 321 mmio_write_32(ufs_params.reg_base + UTRLBA, 323 mmio_write_32(ufs_params.reg_base + UTRLBAU, 373 mmio_write_32(ufs_params.reg_base + UTRLBA [all...] |
/device/linaro/bootloader/arm-trusted-firmware/drivers/synopsys/ufs/ |
dw_ufs.c | 22 assert((params != NULL) && (params->reg_base != 0)); 24 base = params->reg_base; 101 assert((params != NULL) && (params->reg_base != 0)); 103 base = params->reg_base; 184 ufs_params.reg_base = params->reg_base;
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/toolchain/binutils/binutils-2.27/opcodes/ |
nios2-dis.c | 275 struct nios2_reg *reg_base; local 298 reg_base = nios2_control_regs (); 299 (*info->fprintf_func) (info->stream, "%s", reg_base[i].name); 303 reg_base = nios2_regs; 312 reg_base = nios2_coprocessor_regs (); 321 reg_base = nios2_coprocessor_regs (); 330 (*info->fprintf_func) (info->stream, "%s", reg_base[i].name); 336 reg_base = nios2_regs; 348 reg_base = nios2_coprocessor_regs (); 372 reg_base = nios2_coprocessor_regs () [all...] |
tic6x-dis.c | 810 unsigned int reg_base = 0; local 920 reg_base = 16; 932 snprintf (operands[op_num], 24, "%c%u", reg_side, reg_base + fld_val); 938 snprintf (operands[op_num], 24, "%c%u", reg_side, reg_base + fld_val); 949 snprintf (operands[op_num], 24, "b%u", reg_base + fld_val); 960 snprintf (operands[op_num], 24, "%c%u", reg_side, reg_base + fld_val); 966 snprintf (operands[op_num], 24, "%c%u", reg_side, reg_base + fld_val); 975 reg_side, reg_base + fld_val + 1, 976 reg_side, reg_base + fld_val); 985 reg_side, reg_base + fld_val + 1 [all...] |
/art/compiler/debug/dwarf/ |
debug_frame_opcode_writer.h | 83 void ALWAYS_INLINE RelOffsetForMany(Reg reg_base, int offset, 92 RelOffset(Reg(reg_base.num() + i), offset); 99 void ALWAYS_INLINE RestoreMany(Reg reg_base, uint32_t reg_mask) { 106 Restore(Reg(reg_base.num() + i));
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/device/linaro/bootloader/arm-trusted-firmware/plat/hisilicon/poplar/include/ |
hi3798cv200.h | 73 .reg_base = REG_BASE_MCI, \
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/device/linaro/bootloader/arm-trusted-firmware/include/drivers/ |
dw_ufs.h | 102 uintptr_t reg_base; member in struct:dw_ufs_params
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ufs.h | 503 uintptr_t reg_base; member in struct:ufs_params
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/external/mesa3d/src/gallium/drivers/radeonsi/ |
si_perfcounter.c | 533 unsigned reg_base = regs->select0; local 538 radeon_set_uconfig_reg_seq(cs, reg_base, reg_count); 548 reg_base -= (reg_count - 1) * 4; 549 radeon_set_uconfig_reg_seq(cs, reg_base, reg_count);
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/device/linaro/bootloader/arm-trusted-firmware/plat/hisilicon/hikey960/ |
hikey960_bl2_setup.c | 182 ufs_params.reg_base = UFS_REG_BASE;
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hikey960_bl1_setup.c | 590 ufs_params.reg_base = UFS_REG_BASE;
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/device/linaro/bootloader/arm-trusted-firmware/plat/hisilicon/hikey/ |
hikey_bl2_setup.c | 469 params.reg_base = DWMMC0_BASE;
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hikey_bl1_setup.c | 522 params.reg_base = DWMMC0_BASE;
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/external/vixl/src/aarch64/ |
macro-assembler-aarch64.cc | 2367 Register reg_base = scratch_scope->AcquireX(); local 2380 Register reg_base = scratch_scope->AcquireX(); local [all...] |
/external/vixl/test/aarch64/ |
test-assembler-aarch64.cc | 13940 Register reg_base = x20; local [all...] |