/hardware/intel/common/libmix/mix_vbp/viddec_fw/fw/parser/ |
viddec_intr.c | 11 //reg_write(INT_REG, 0); 35 reg_write(INT_REG, temp); 38 //reg_write(DMA_CONTROL_STATUS, val); 45 reg_write(INT_REG, temp); 51 reg_write(INT_REG, temp);
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utils.c | 129 reg_write(DMA_SYSTEM_ADDRESS, (ddr_addr & ~3) & ~GV_DDR_MEM_MASK); 130 reg_write(DMA_LOCAL_ADDRESS, (local_addr & 0xfffc)); 134 reg_write(DMA_CONTROL_STATUS, DMA_CTRL_STATUS_DONE); 143 reg_write(DMA_CONTROL_STATUS, val); 148 reg_write(DMA_CONTROL_STATUS, DMA_CTRL_STATUS_DONE); 176 reg_write(DMA_SYSTEM_ADDRESS, (ddr_addr & ~3)); 177 reg_write(DMA_LOCAL_ADDRESS, (local_addr & 0xfffc)); 181 reg_write(DMA_CONTROL_STATUS, DMA_CTRL_STATUS_DONE); 190 reg_write(DMA_CONTROL_STATUS, val); 195 reg_write(DMA_CONTROL_STATUS, DMA_CTRL_STATUS_DONE) [all...] |
main.c | 134 reg_write(CONFIG_IPC_ROFF_HOST_DOORBELL, value ); 481 reg_write(CONFIG_IPC_ROFF_RISC_DOORBELL_STATUS, 0x2); /* Inform Host we are done with this message */ 553 reg_write(CONFIG_IPC_ROFF_HOST_DOORBELL, VIDDEC_FW_PARSER_IPC_HOST_INT); 581 reg_write(CONFIG_IPC_ROFF_HOST_RX_DOORBELL, GV_FW_IPC_HOST_SYNC);
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/hardware/intel/common/libmix/mix_vbp/viddec_fw/fw/parser/include/ |
fw_pvt.h | 76 static inline void reg_write(uint32_t offset, uint32_t value) function
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/external/capstone/bindings/python/pyx/ |
ccapstone.pyx | 211 def reg_write(self, reg_id): member in class:CsInsn
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/external/capstone/bindings/python/capstone/ |
__init__.py | 649 def reg_write(self, reg_id): member in class:CsInsn
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