/external/selinux/mcstrans/share/examples/urcsts-via-include/setrans.d/ |
system.conf | 4 s15:c0.c1023=SystemHigh
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/external/compiler-rt/lib/builtins/arm/ |
fixsfsivfp.S | 22 vmov s15, r0 // load float register from R0 23 vcvt.s32.f32 s15, s15 // convert single to 32-bit int into s15 24 vmov r0, s15 // move s15 to result register
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fixunssfsivfp.S | 23 vmov s15, r0 // load float register from R0 24 vcvt.u32.f32 s15, s15 // convert single to 32-bit unsigned into s15 25 vmov r0, s15 // move s15 to result register
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floatsisfvfp.S | 22 vmov s15, r0 // move int to float register s15 23 vcvt.f32.s32 s15, s15 // convert 32-bit int in s15 to float in s15 24 vmov r0, s15 // move s15 to result register
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floatunssisfvfp.S | 22 vmov s15, r0 // move int to float register s15 23 vcvt.f32.u32 s15, s15 // convert 32-bit int in s15 to float in s15 24 vmov r0, s15 // move s15 to result register
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addsf3vfp.S | 22 vmov s15, r1 // move second param from r1 into float register 23 vadd.f32 s14, s14, s15
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divsf3vfp.S | 22 vmov s15, r1 // move second param from r1 into float register 23 vdiv.f32 s13, s14, s15
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eqsf2vfp.S | 23 vmov s15, r1 // move from GPR 1 to float register 24 vcmp.f32 s14, s15
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extendsfdf2vfp.S | 22 vmov s15, r0 // load float register from R0 23 vcvt.f64.f32 d7, s15 // convert single to double
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fixdfsivfp.S | 23 vcvt.s32.f64 s15, d7 // convert double to 32-bit int into s15 24 vmov r0, s15 // move s15 to result register
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fixunsdfsivfp.S | 24 vcvt.u32.f64 s15, d7 // convert double to 32-bit int into s15 25 vmov r0, s15 // move s15 to result register
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floatsidfvfp.S | 22 vmov s15, r0 // move int to float register s15 23 vcvt.f64.s32 d7, s15 // convert 32-bit int in s15 to double in d7
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floatunssidfvfp.S | 22 vmov s15, r0 // move int to float register s15 23 vcvt.f64.u32 d7, s15 // convert 32-bit int in s15 to double in d7
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gesf2vfp.S | 23 vmov s15, r1 // move from GPR 1 to float register 24 vcmp.f32 s14, s15
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gtsf2vfp.S | 23 vmov s15, r1 // move from GPR 1 to float register 24 vcmp.f32 s14, s15
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lesf2vfp.S | 23 vmov s15, r1 // move from GPR 1 to float register 24 vcmp.f32 s14, s15
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ltsf2vfp.S | 23 vmov s15, r1 // move from GPR 1 to float register 24 vcmp.f32 s14, s15
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mulsf3vfp.S | 22 vmov s15, r1 // move second param from r1 into float register 23 vmul.f32 s13, s14, s15
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nesf2vfp.S | 23 vmov s15, r1 // move from GPR 1 to float register 24 vcmp.f32 s14, s15
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subsf3vfp.S | 23 vmov s15, r1 // move second param from r1 into float register 24 vsub.f32 s14, s14, s15
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truncdfsf2vfp.S | 23 vcvt.f32.f64 s15, d7 // convert double to single (trucate precision) 24 vmov r0, s15 // return result in r0
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unordsf2vfp.S | 23 vmov s15, r1 // move from GPR 1 to float register 24 vcmp.f32 s14, s15
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/toolchain/binutils/binutils-2.27/gas/testsuite/gas/aarch64/ |
floatdp2.d | 8 0: 1e2f08e0 fmul s0, s7, s15 9 4: 1e2f18e0 fdiv s0, s7, s15 10 8: 1e2f28e0 fadd s0, s7, s15 11 c: 1e2f38e0 fsub s0, s7, s15 12 10: 1e2f48e0 fmax s0, s7, s15 13 14: 1e2f58e0 fmin s0, s7, s15 14 18: 1e2f68e0 fmaxnm s0, s7, s15 15 1c: 1e2f78e0 fminnm s0, s7, s15 16 20: 1e2f88e0 fnmul s0, s7, s15
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/external/selinux/mcstrans/share/examples/default/ |
setrans.conf | 20 s15:c0.c1023=SystemHigh 21 s0-s15:c0.c1023=SystemLow-SystemHigh 34 s1-s15:c0.c1023=Unclassified-SystemHigh 47 s2-s15:c0.c1023=Secret-SystemHigh 49 s2:c0-s15:c0.c1023=Secret:A-SystemHigh 51 s2:c1-s15:c0.c1023=Secret:B-SystemHigh 52 s2:c0,c1-s15:c0.c1023=Secret:AB-SystemHigh
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/external/selinux/mcstrans/share/examples/include/setrans.d/ |
include-example | 20 s15:c0.c1023=SystemHigh 21 s0-s15:c0.c1023=SystemLow-SystemHigh 34 s1-s15:c0.c1023=Unclassified-SystemHigh 47 s2-s15:c0.c1023=Secret-SystemHigh 49 s2:c0-s15:c0.c1023=Secret:A-SystemHigh 51 s2:c1-s15:c0.c1023=Secret:B-SystemHigh 52 s2:c0,c1-s15:c0.c1023=Secret:AB-SystemHigh
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