| /external/llvm/test/MC/AArch64/ |
| neon-scalar-by-elem-saturating-mul.s | 30 sqdmulh s25, s26, v27.s[3]
36 // CHECK: sqdmulh s25, s26, v27.s[3] // encoding: [0x59,0xcb,0xbb,0x5f]
47 sqrdmulh s20, s26, v27.s[1]
53 // CHECK: sqrdmulh s20, s26, v27.s[1] // encoding: [0x54,0xd3,0xbb,0x5f]
|
| basic-a64-diagnostics.s | [all...] |
| basic-a64-instructions.s | [all...] |
| neon-diagnostics.s | [all...] |
| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/aarch64/ |
| fp-const0-parse.s | 29 fcmlt s4, s26, #0
48 fcmlt s4, s26, #0.0
|
| fp-const0-parse.d | 12 10: 5ea0eb44 fcmlt s4, s26, #0.0
27 4c: 5ea0eb44 fcmlt s4, s26, #0.0
|
| /external/capstone/suite/MC/AArch64/ |
| neon-scalar-by-elem-saturating-mul.s.cs | 12 0x59,0xcb,0xbb,0x5f = sqdmulh s25, s26, v27.s[3] package
18 0x54,0xd3,0xbb,0x5f = sqrdmulh s20, s26, v27.s[1] package
|
| basic-a64-instructions.s.cs | 729 0x7a,0x43,0xe2,0x1e = fcvt s26, h27
1204 0xfb,0x6b,0x20,0x2d = stp s27, s26, [sp, #-256] package
1223 0xfb,0x6b,0xa0,0x2c = stp s27, s26, [sp], #-256 package
1242 0xfb,0x6b,0xa0,0x2d = stp s27, s26, [sp, #-256]! package
1258 0xfb,0x6b,0x20,0x2c = stnp s27, s26, [sp, #-256] package
[all...] |
| /external/llvm/test/MC/ARM/ |
| d16.s | 23 @ D16-NEXT: vcvt.f32.f64 s26, d30
24 vcvt.f32.f64 s26, d30
|
| simple-fp-encoding.s | 323 @ CHECK: vmovne s25, s26, r2, r5
324 vmovne s25, s26, r2, r5 @ encoding: [0x39,0x2a,0x45,0x1c]
|
| /art/test/623-checker-loop-regressions/src/ |
| Main.java | 542 int s26 = 0; local
575 s26 += c[i];
584 s24 + s25 + s26 + s27 + s28 + s29 + s30 + s31;
|
| /external/clang/test/CodeGen/ |
| x86_32-arguments-darwin.c | 120 struct s26 { struct { char a, b; } a; struct { char a, b; } b; } f26(void) { while (1) {} } struct
|
| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/arm/ |
| vfp1xD.d | 182 0+2b0 <[^>]*> eeb5da40 (vcmp\.f32 s26, #0.0|fcmpzs s26)
200 0+2f8 <[^>]*> 0e1dea8d (vnmlseq\.f32|fmscseq) s28, s27, s26
|
| vfp1xD.s | 246 fcmpzs s26
279 fmscseq s28, s27, s26
|
| vfp1xD_t2.s | 249 fcmpzs s26
286 fmscseq s28, s27, s26
|
| vfp1xD_t2.d | 182 0+2b0 <[^>]*> eeb5 da40 (vcmp\.f32 s26, #0.0|fcmpzs s26)
204 0+300 <[^>]*> ee1d ea8d (vnmlseq\.f32|fmscseq) s28, s27, s26
|
| /external/swiftshader/third_party/LLVM/test/MC/ARM/ |
| simple-fp-encoding.s | 244 @ CHECK: vmovne s25, s26, r2, r5
245 vmovne s25, s26, r2, r5 @ encoding: [0x39,0x2a,0x45,0x1c]
|
| /external/vixl/test/aarch64/ |
| test-api-aarch64.cc | 180 VIXL_CHECK(AreConsecutive(s26, s27, s28, s29));
|
| test-trace-aarch64.cc | 407 __ facgt(s12, s26, s12);
491 __ fcvtpu(wzr, s26);
520 __ fdiv(s26, s5, s25);
548 __ fnmadd(s0, s18, s26, s18);
550 __ fnmsub(s29, s0, s11, s26);
592 __ scvtf(s26, x12, 38);
[all...] |
| test-assembler-aarch64.cc | [all...] |
| /external/v8/src/arm/ |
| simulator-arm.h | 123 s24, s25, s26, s27, s28, s29, s30, s31, enumerator in enum:v8::internal::Simulator::Register
|
| assembler-arm.h | 64 V(s24) V(s25) V(s26) V(s27) V(s28) V(s29) V(s30) V(s31)
357 const SwVfpRegister s26 = { 26 };
[all...] |
| /external/valgrind/none/tests/arm/ |
| vfp.c | 870 "vldmdb r1!, {s25, s26}\n\t"
880 "vmov r1, s26\n\t"
1048 "s20", "s21", "s22", "s23", "s25", "s26",
[all...] |
| /art/compiler/utils/arm64/ |
| managed_register_arm64_test.cc | [all...] |
| /external/v8/benchmarks/ |
| regexp.js | 207 var s26 = computeInputVariants('VC=74.125.75.1', 81);
242 re8.exec(s26[i]);
[all...] |
