| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/aarch64/ |
| fp-const0-parse.s | 27 fcmgt s2, s28, #0
46 fcmgt s2, s28, #0.0
|
| fp-const0-parse.d | 10 8: 5ea0cb82 fcmgt s2, s28, #0.0
25 44: 5ea0cb82 fcmgt s2, s28, #0.0
|
| /external/clang/test/CodeGen/ |
| arm-arguments.c | 145 struct s28 { _Complex char f0; }; struct
146 struct s28 f28() {}
|
| arm64-arguments.c | 106 struct s28 { _Complex char f0; }; struct
107 struct s28 f28() {}
|
| x86_32-arguments-darwin.c | 123 // CHECK: void @f28(%struct.s28* noalias sret %agg.result)
124 struct s28 { int a; int b[]; } f28(void) { while (1) {} } struct
|
| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/arm/ |
| vldconst.d | 11 00000008 <foo\+0x8> ed9fea0c vldr s28, \[pc, #48\] ; 00000040 <foo\+0x40>
15 00000018 <foo\+0x18> ed9fea09 vldr s28, \[pc, #36\] ; 00000044 <foo\+0x44>
19 00000028 <foo\+0x28> ed9fea06 vldr s28, \[pc, #24\] ; 00000048 <foo\+0x48>
23 00000038 <foo\+0x38> ed9fea03 vldr s28, \[pc, #12\] ; 0000004c <foo\+0x4c>
31 00000058 <foo\+0x58> ed9fea0c vldr s28, \[pc, #48\] ; 00000090 <foo\+0x90>
35 00000068 <foo\+0x68> ed9fea09 vldr s28, \[pc, #36\] ; 00000094 <foo\+0x94>
39 00000078 <foo\+0x78> ed9fea06 vldr s28, \[pc, #24\] ; 00000098 <foo\+0x98>
43 00000088 <foo\+0x88> ed9fea03 vldr s28, \[pc, #12\] ; 0000009c <foo\+0x9c>
51 000000a8 <foo\+0xa8> 0d9fea0c vldreq s28, \[pc, #48\] ; 000000e0 <foo\+0xe0>
55 000000b8 <foo\+0xb8> 0d9fea09 vldreq s28, \[pc, #36\] ; 000000e4 <foo\+0xe4
[all...] |
| vldconst_be.d | 12 00000008 <foo\+0x8> ed9fea0c vldr s28, \[pc, #48\] ; 00000040 <foo\+0x40>
16 00000018 <foo\+0x18> ed9fea09 vldr s28, \[pc, #36\] ; 00000044 <foo\+0x44>
20 00000028 <foo\+0x28> ed9fea06 vldr s28, \[pc, #24\] ; 00000048 <foo\+0x48>
24 00000038 <foo\+0x38> ed9fea03 vldr s28, \[pc, #12\] ; 0000004c <foo\+0x4c>
32 00000058 <foo\+0x58> ed9fea0c vldr s28, \[pc, #48\] ; 00000090 <foo\+0x90>
36 00000068 <foo\+0x68> ed9fea09 vldr s28, \[pc, #36\] ; 00000094 <foo\+0x94>
40 00000078 <foo\+0x78> ed9fea06 vldr s28, \[pc, #24\] ; 00000098 <foo\+0x98>
44 00000088 <foo\+0x88> ed9fea03 vldr s28, \[pc, #12\] ; 0000009c <foo\+0x9c>
52 000000a8 <foo\+0xa8> 0d9fea0c vldreq s28, \[pc, #48\] ; 000000e0 <foo\+0xe0>
56 000000b8 <foo\+0xb8> 0d9fea09 vldreq s28, \[pc, #36\] ; 000000e4 <foo\+0xe4
[all...] |
| thumb2_vpool.d | 12 00000008 <thumb2_ldr\+0x8> ed9f ea0d vldr s28, \[pc, #52\] ; 00000040 <thumb2_ldr\+0x40>
16 00000018 <thumb2_ldr\+0x18> ed9f ea0a vldr s28, \[pc, #40\] ; 00000044 <thumb2_ldr\+0x44>
20 00000028 <thumb2_ldr\+0x28> ed9f ea07 vldr s28, \[pc, #28\] ; 00000048 <thumb2_ldr\+0x48>
24 00000038 <thumb2_ldr\+0x38> ed9f ea04 vldr s28, \[pc, #16\] ; 0000004c <thumb2_ldr\+0x4c>
32 00000058 <thumb2_ldr\+0x58> ed9f ea0d vldr s28, \[pc, #52\] ; 00000090 <thumb2_ldr\+0x90>
36 00000068 <thumb2_ldr\+0x68> ed9f ea0a vldr s28, \[pc, #40\] ; 00000094 <thumb2_ldr\+0x94>
40 00000078 <thumb2_ldr\+0x78> ed9f ea07 vldr s28, \[pc, #28\] ; 00000098 <thumb2_ldr\+0x98>
44 00000088 <thumb2_ldr\+0x88> ed9f ea04 vldr s28, \[pc, #16\] ; 0000009c <thumb2_ldr\+0x9c>
|
| thumb2_vpool_be.d | 13 00000008 <thumb2_ldr\+0x8> ed9f ea0d vldr s28, \[pc, #52\] ; 00000040 <thumb2_ldr\+0x40>
17 00000018 <thumb2_ldr\+0x18> ed9f ea0a vldr s28, \[pc, #40\] ; 00000044 <thumb2_ldr\+0x44>
21 00000028 <thumb2_ldr\+0x28> ed9f ea07 vldr s28, \[pc, #28\] ; 00000048 <thumb2_ldr\+0x48>
25 00000038 <thumb2_ldr\+0x38> ed9f ea04 vldr s28, \[pc, #16\] ; 0000004c <thumb2_ldr\+0x4c>
33 00000058 <thumb2_ldr\+0x58> ed9f ea0d vldr s28, \[pc, #52\] ; 00000090 <thumb2_ldr\+0x90>
37 00000068 <thumb2_ldr\+0x68> ed9f ea0a vldr s28, \[pc, #40\] ; 00000094 <thumb2_ldr\+0x94>
41 00000078 <thumb2_ldr\+0x78> ed9f ea07 vldr s28, \[pc, #28\] ; 00000098 <thumb2_ldr\+0x98>
45 00000088 <thumb2_ldr\+0x88> ed9f ea04 vldr s28, \[pc, #16\] ; 0000009c <thumb2_ldr\+0x9c>
|
| vfp1xD.s | 248 fcmpzs s28
279 fmscseq s28, s27, s26
312 fstmfdseq r4!, {s28}
|
| vfp1xD_t2.s | 251 fcmpzs s28
286 fmscseq s28, s27, s26
325 fstmfdseq r4!, {s28}
|
| vfp1xD.d | 184 0+2b8 <[^>]*> eeb5ea40 (vcmp\.f32 s28, #0.0|fcmpzs s28)
200 0+2f8 <[^>]*> 0e1dea8d (vnmlseq\.f32|fmscseq) s28, s27, s26
225 0+35c <[^>]*> 0d24ea01 (vstmdbeq|fstmdbseq) r4!, {s28}
|
| vfp1xD_t2.d | 184 0+2b8 <[^>]*> eeb5 ea40 (vcmp\.f32 s28, #0.0|fcmpzs s28)
204 0+300 <[^>]*> ee1d ea8d (vnmlseq\.f32|fmscseq) s28, s27, s26
235 0+370 <[^>]*> ed24 ea01 (vstmdbeq|fstmdbseq) r4!, {s28}
|
| /external/llvm/test/MC/ARM/ |
| fullfp16.s | 93 vcvt.u16.f16 s28, s28, #1
101 @ ARM: vcvt.u16.f16 s28, s28, #1 @ encoding: [0x67,0xe9,0xbf,0xee]
109 @ THUMB: vcvt.u16.f16 s28, s28, #1 @ encoding: [0xbf,0xee,0x67,0xe9]
153 vseleq.f16 s30, s28, s23
154 @ ARM: vseleq.f16 s30, s28, s23 @ encoding: [0x2b,0xf9,0x0e,0xfe]
155 @ THUMB: vseleq.f16 s30, s28, s23 @ encoding: [0x0e,0xfe,0x2b,0xf9]
|
| fullfp16-neg.s | 71 vcvt.u16.f16 s28, s28, #1
113 vseleq.f16 s30, s28, s23
|
| fp-armv8.s | 72 vseleq.f32 s30, s28, s23
73 @ CHECK: vseleq.f32 s30, s28, s23 @ encoding: [0x2b,0xfa,0x0e,0xfe]
|
| thumb-fp-armv8.s | 75 vseleq.f32 s30, s28, s23
76 @ CHECK: vseleq.f32 s30, s28, s23 @ encoding: [0x0e,0xfe,0x2b,0xfa]
|
| simple-fp-encoding.s | 366 vcvt.u16.f32 s28, s28, #1
384 @ CHECK: vcvt.u16.f32 s28, s28, #1 @ encoding: [0x67,0xea,0xbf,0xee]
|
| /external/valgrind/none/tests/arm64/ |
| fp_and_simd.stdout.exp | [all...] |
| /art/test/623-checker-loop-regressions/src/ |
| Main.java | 544 int s28 = 0; local
577 s28 += a[i];
584 s24 + s25 + s26 + s27 + s28 + s29 + s30 + s31;
|
| /external/capstone/suite/MC/ARM/ |
| fp-armv8.s.cs | 30 0x2b,0xfa,0x0e,0xfe = vseleq.f32 s30, s28, s23 package
|
| thumb-fp-armv8.s.cs | 30 0x0e,0xfe,0x2b,0xfa = vseleq.f32 s30, s28, s23 package
|
| simple-fp-encoding.s.cs | 150 0x67,0xea,0xbf,0xee = vcvt.u16.f32 s28, s28, #1 package
|
| /external/vixl/test/aarch64/ |
| test-api-aarch64.cc | 180 VIXL_CHECK(AreConsecutive(s26, s27, s28, s29));
208 VIXL_CHECK(!AreConsecutive(s28, s30, NoVReg, NoVReg));
|
| /external/valgrind/none/tests/arm/ |
| vfp.c | [all...] |
