| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/mips/ |
| vr5400.s | 95 /* ALNI, SHFL: Vector only. */
97 shfl.mixh.ob $f0,$f2,$f4
98 shfl.mixl.ob $f0,$f2,$f4
99 shfl.pach.ob $f0,$f2,$f4
100 shfl.pacl.ob $f0,$f2,$f4
|
| set-arch.s | 430 /* ALNI, SHFL: Vector only. */
432 shfl.mixh.ob $f0,$f2,$f4
433 shfl.mixl.ob $f0,$f2,$f4
434 shfl.pach.ob $f0,$f2,$f4
435 shfl.pacl.ob $f0,$f2,$f4
|
| sb1-ext-mdmx.s | 116 shfl.mixh.ob $v1, $v12, $v18
118 shfl.mixl.ob $v1, $v12, $v18
120 shfl.pach.ob $v1, $v12, $v18
122 shfl.upsl.ob $v1, $v12, $v18
|
| mips64-mdmx.s | 221 shfl.bfla.qh $v1, $v12, $v18
223 shfl.mixh.ob $v1, $v12, $v18
224 shfl.mixh.qh $v1, $v12, $v18
226 shfl.mixl.ob $v1, $v12, $v18
227 shfl.mixl.qh $v1, $v12, $v18
229 shfl.pach.ob $v1, $v12, $v18
230 shfl.pach.qh $v1, $v12, $v18
232 shfl.repa.qh $v1, $v12, $v18
234 shfl.repb.qh $v1, $v12, $v18
236 shfl.upsl.ob $v1, $v12, $v1
[all...] |
| mips64-mdmx.d | 162 0+0260 <[^>]*> 7a32605f shfl\.bfla\.qh \$v1,\$v12,\$v18
163 0+0264 <[^>]*> 7992605f shfl\.mixh\.ob \$v1,\$v12,\$v18
164 0+0268 <[^>]*> 7832605f shfl\.mixh\.qh \$v1,\$v12,\$v18
165 0+026c <[^>]*> 79d2605f shfl\.mixl\.ob \$v1,\$v12,\$v18
166 0+0270 <[^>]*> 78b2605f shfl\.mixl\.qh \$v1,\$v12,\$v18
167 0+0274 <[^>]*> 7912605f shfl\.pach\.ob \$v1,\$v12,\$v18
168 0+0278 <[^>]*> 7932605f shfl\.pach\.qh \$v1,\$v12,\$v18
169 0+027c <[^>]*> 7b32605f shfl\.repa\.qh \$v1,\$v12,\$v18
170 0+0280 <[^>]*> 7bb2605f shfl\.repb\.qh \$v1,\$v12,\$v18
171 0+0284 <[^>]*> 78d2605f shfl\.upsl\.ob \$v1,\$v12,\$v1
[all...] |
| sb1-ext-mdmx.d | 82 0+0120 <[^>]*> 7992605f shfl\.mixh\.ob \$v1,\$v12,\$v18
83 0+0124 <[^>]*> 79d2605f shfl\.mixl\.ob \$v1,\$v12,\$v18
84 0+0128 <[^>]*> 7912605f shfl\.pach\.ob \$v1,\$v12,\$v18
85 0+012c <[^>]*> 78d2605f shfl\.upsl\.ob \$v1,\$v12,\$v18
|
| vr5400.d | 111 0+019c <stuff\+0x19c> shfl\.mixh\.ob \$f0,\$f2,\$f4
112 0+01a0 <stuff\+0x1a0> shfl\.mixl\.ob \$f0,\$f2,\$f4
113 0+01a4 <stuff\+0x1a4> shfl\.pach\.ob \$f0,\$f2,\$f4
114 0+01a8 <stuff\+0x1a8> shfl\.pacl\.ob \$f0,\$f2,\$f4
|
| /external/mesa3d/src/gallium/drivers/nouveau/codegen/ |
| nv50_ir_lowering_gm107.cpp | 189 Instruction *shfl; local
206 shfl = bld.mkOp2(OP_SHFL, TYPE_F32, bld.getScratch(),
208 shfl->subOp = NV50_IR_SUBOP_SHFL_BFLY;
213 insn->setSrc(0, shfl->getDef(0));
|
| /toolchain/binutils/binutils-2.27/opcodes/ |
| mips-opc.c | [all...] |
| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/tic6x/ |
| insns-bad-1.s | 995 shfl .S1 a0,a0
996 shfl .M1 a0,a0,a0
997 shfl .M1 a0,b0
998 shfl .M2X b0,b0
|
| insns-c674x.s | 1120 shfl .M1 a17,a18
1121 [b1] shfl .M1X b19,a20
1122 [!a1] shfl .M2 b21,b22
1123 shfl .M2X a23,b24
[all...] |
| insns-c674x.d | [all...] |
| /toolchain/binutils/binutils-2.27/include/opcode/ |
| tic6x-opcode-table.h | [all...] |
