| /external/libjpeg-turbo/simd/ |
| jsimd_arm64_neon.S | 289 smull2 v19.4s, v18.8h, XFIX_P_0_541 /* z1h z1 = MULTIPLY(z2 + z3, FIX_0_541196100); */
321 smull2 v11.4s, v9.8h, XFIX_P_0_298 /* tmp0 = MULTIPLY(tmp0, FIX_0_298631336) */
322 smull2 v13.4s, v7.8h, XFIX_P_2_053 /* tmp1 = MULTIPLY(tmp1, FIX_2_053119869) */
323 smull2 v15.4s, v5.8h, XFIX_P_3_072 /* tmp2 = MULTIPLY(tmp2, FIX_3_072711026) */
324 smull2 v17.4s, v3.8h, XFIX_P_1_501 /* tmp3 = MULTIPLY(tmp3, FIX_1_501321110) */
325 smull2 v27.4s, v26.8h, XFIX_P_1_175 /* z5h z5 = MULTIPLY(z3 + z4, FIX_1_175875602) */
326 smull2 v23.4s, v22.8h, XFIX_N_1_961 /* z3 = MULTIPLY(z3, - FIX_1_961570560) */
327 smull2 v25.4s, v24.8h, XFIX_N_0_390 /* z4 = MULTIPLY(z4, - FIX_0_390180644) */
328 smull2 v19.4s, v18.8h, XFIX_N_0_899 /* z1 = MULTIPLY(z1, - FIX_0_899976223) */
329 smull2 v21.4s, v20.8h, XFIX_N_2_562 /* z2 = MULTIPLY(z2, - FIX_2_562915447) *
[all...] |
| /external/libavc/common/armv8/ |
| ih264_iquant_itrans_recon_av8.s | 561 smull2 v17.4s, v0.8h, v8.8h
563 smull2 v19.4s, v1.8h, v9.8h
565 smull2 v21.4s, v2.8h, v10.8h
567 smull2 v23.4s, v3.8h, v11.8h
569 smull2 v25.4s, v4.8h, v12.8h
571 smull2 v27.4s, v5.8h, v13.8h
573 smull2 v29.4s, v6.8h, v14.8h
575 smull2 v31.4s, v7.8h, v15.8h
|
| /external/capstone/suite/MC/AArch64/ |
| neon-2velem.s.cs | 87 0x20,0xa0,0x62,0x4f = smull2 v0.4s, v1.8h, v2.h[2]
88 0x20,0xa8,0x82,0x4f = smull2 v0.2d, v1.4s, v2.s[2]
89 0x20,0xa8,0x96,0x4f = smull2 v0.2d, v1.4s, v22.s[2]
|
| neon-3vdiff.s.cs | 77 0x20,0xc0,0x22,0x4e = smull2 v0.8h, v1.16b, v2.16b
78 0x20,0xc0,0x62,0x4e = smull2 v0.4s, v1.8h, v2.8h
79 0x20,0xc0,0xa2,0x4e = smull2 v0.2d, v1.4s, v2.4s
|
| /external/llvm/test/MC/AArch64/ |
| neon-2velem.s | 222 smull2 v0.4s, v1.8h, v2.h[2]
223 smull2 v0.2d, v1.4s, v2.s[2]
224 smull2 v0.2d, v1.4s, v22.s[2]
229 // CHECK: smull2 v0.4s, v1.8h, v2.h[2] // encoding: [0x20,0xa0,0x62,0x4f]
230 // CHECK: smull2 v0.2d, v1.4s, v2.s[2] // encoding: [0x20,0xa8,0x82,0x4f]
231 // CHECK: smull2 v0.2d, v1.4s, v22.s[2] // encoding: [0x20,0xa8,0x96,0x4f]
|
| neon-3vdiff.s | 217 smull2 v0.8h, v1.16b, v2.16b
218 smull2 v0.4s, v1.8h, v2.8h
219 smull2 v0.2d, v1.4s, v2.4s
221 // CHECK: smull2 v0.8h, v1.16b, v2.16b // encoding: [0x20,0xc0,0x22,0x4e]
222 // CHECK: smull2 v0.4s, v1.8h, v2.8h // encoding: [0x20,0xc0,0x62,0x4e]
223 // CHECK: smull2 v0.2d, v1.4s, v2.4s // encoding: [0x20,0xc0,0xa2,0x4e]
|
| neon-diagnostics.s | [all...] |
| arm64-advsimd.s | [all...] |
| /frameworks/rs/cpu_ref/ |
| rsCpuIntrinsics_advsimd_Convolve.S | 67 smull2 v9.4s, v2.8h, v0.h[0]
151 smull2 v5.4s, v9.8h, v0.h[0]
|
| rsCpuIntrinsics_advsimd_Resize.S | 512 smull2 v9.4s, v12.8h, v0.8h
558 smull2 v9.4s, v12.8h, v16.8h
581 smull2 v11.4s, v12.8h, v16.8h
|
| rsCpuIntrinsics_advsimd_ColorMatrix.S | 56 smull2 \opd, \opa, \opb
[all...] |
| /external/vixl/src/aarch64/ |
| logic-aarch64.cc | 901 LogicVRegister Simulator::smull2(VectorFormat vform, function in class:vixl::aarch64::Simulator
909 return smull2(vform, dst, src1, dup_element(indexform, temp, src2, index));
3159 LogicVRegister Simulator::smull2(VectorFormat vform, function in class:vixl::aarch64::Simulator
[all...] |
| assembler-aarch64.h | [all...] |
| macro-assembler-aarch64.h | [all...] |
| simulator-aarch64.h | [all...] |
| simulator-aarch64.cc | [all...] |
| assembler-aarch64.cc | [all...] |
| /external/vixl/test/aarch64/ |
| test-trace-aarch64.cc | [all...] |
| /external/valgrind/none/tests/arm64/ |
| fp_and_simd.stdout.exp | [all...] |
