| /external/llvm/test/MC/AArch64/ |
| neon-shift-left-long.s | 11 sshll2 v0.8h, v1.16b, #3
12 sshll2 v0.4s, v1.8h, #3
13 sshll2 v0.2d, v1.4s, #3
18 // CHECK: sshll2 v0.8h, v1.16b, #3 // encoding: [0x20,0xa4,0x0b,0x4f]
19 // CHECK: sshll2 v0.4s, v1.8h, #3 // encoding: [0x20,0xa4,0x13,0x4f]
20 // CHECK: sshll2 v0.2d, v1.4s, #3 // encoding: [0x20,0xa4,0x23,0x4f]
|
| arm64-advsimd.s | [all...] |
| neon-diagnostics.s | [all...] |
| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/aarch64/ |
| no-aliases.d | 78 114: 4f08a448 sshll2 v8.8h, v2.16b, #0
79 118: 4f08a448 sshll2 v8.8h, v2.16b, #0
82 124: 4f10a448 sshll2 v8.4s, v2.8h, #0
83 128: 4f10a448 sshll2 v8.4s, v2.8h, #0
86 134: 4f20a448 sshll2 v8.2d, v2.4s, #0
87 138: 4f20a448 sshll2 v8.2d, v2.4s, #0
|
| /external/valgrind/none/tests/arm64/ |
| fp_and_simd.c | [all...] |
| fp_and_simd.stdout.exp | [all...] |
| /external/libjpeg-turbo/simd/ |
| jsimd_arm64_neon.S | 292 sshll2 v23.4s, v22.8h, #(CONST_BITS) /* tmp0h tmp0 = LEFT_SHIFT(z2 + z3, CONST_BITS); */
297 sshll2 v27.4s, v26.8h, #(CONST_BITS) /* tmp1h tmp1 = LEFT_SHIFT(z2 - z3, CONST_BITS); */
552 sshll2 v23.4s, v22.8h, #(CONST_BITS) /* tmp0h tmp0 = LEFT_SHIFT(z2 + z3, CONST_BITS); */
555 sshll2 v27.4s, v26.8h, #(CONST_BITS) /* tmp1h tmp1 = LEFT_SHIFT(z2 - z3, CONST_BITS); */
[all...] |
| /frameworks/rs/cpu_ref/ |
| rsCpuIntrinsics_advsimd_Resize.S | 421 sshll2 v12.4s, v9.8h, #2
|
| /external/vixl/test/aarch64/ |
| test-trace-aarch64.cc | [all...] |
| /external/vixl/src/aarch64/ |
| assembler-aarch64.cc | [all...] |
| logic-aarch64.cc | 1661 LogicVRegister Simulator::sshll2(VectorFormat vform, function in class:vixl::aarch64::Simulator
[all...] |
| assembler-aarch64.h | [all...] |
| macro-assembler-aarch64.h | [all...] |
| simulator-aarch64.h | [all...] |
| simulator-aarch64.cc | [all...] |
