| /external/capstone/suite/MC/AArch64/ |
| neon-max-min-pairwise.s.cs | 20 0x20,0xac,0x22,0x2e = uminp v0.8b, v1.8b, v2.8b
21 0x20,0xac,0x22,0x6e = uminp v0.16b, v1.16b, v2.16b
22 0x20,0xac,0x62,0x2e = uminp v0.4h, v1.4h, v2.4h
23 0x20,0xac,0x62,0x6e = uminp v0.8h, v1.8h, v2.8h
24 0x20,0xac,0xa2,0x2e = uminp v0.2s, v1.2s, v2.2s
25 0x20,0xac,0xa2,0x6e = uminp v0.4s, v1.4s, v2.4s
|
| /external/llvm/test/MC/AArch64/ |
| neon-max-min-pairwise.s | 53 uminp v0.8b, v1.8b, v2.8b
54 uminp v0.16b, v1.16b, v2.16b
55 uminp v0.4h, v1.4h, v2.4h
56 uminp v0.8h, v1.8h, v2.8h
57 uminp v0.2s, v1.2s, v2.2s
58 uminp v0.4s, v1.4s, v2.4s
60 // CHECK: uminp v0.8b, v1.8b, v2.8b // encoding: [0x20,0xac,0x22,0x2e]
61 // CHECK: uminp v0.16b, v1.16b, v2.16b // encoding: [0x20,0xac,0x22,0x6e]
62 // CHECK: uminp v0.4h, v1.4h, v2.4h // encoding: [0x20,0xac,0x62,0x2e]
63 // CHECK: uminp v0.8h, v1.8h, v2.8h // encoding: [0x20,0xac,0x62,0x6e
[all...] |
| arm64-advsimd.s | 362 uminp.8b v0, v0, v0
433 ; CHECK: uminp.8b v0, v0, v0 ; encoding: [0x00,0xac,0x20,0x2e]
[all...] |
| neon-diagnostics.s | [all...] |
| /external/valgrind/none/tests/arm64/ |
| fp_and_simd.c | [all...] |
| fp_and_simd.stdout.exp | [all...] |
| /external/vixl/test/aarch64/ |
| test-trace-aarch64.cc | [all...] |
| test-simulator-aarch64.cc | [all...] |
| /external/vixl/src/aarch64/ |
| assembler-aarch64.h | [all...] |
| macro-assembler-aarch64.h | [all...] |
| simulator-aarch64.h | [all...] |
| simulator-aarch64.cc | [all...] |
| assembler-aarch64.cc | [all...] |
| logic-aarch64.cc | 1595 LogicVRegister Simulator::uminp(VectorFormat vform, function in class:vixl::aarch64::Simulator
[all...] |
