| /frameworks/rs/cpu_ref/ |
| rsCpuIntrinsics_advsimd_Blend.S | 81 umull2 v12.8h, v7.16b, v0.16b
83 umull2 v13.8h, v7.16b, v1.16b
85 umull2 v14.8h, v7.16b, v2.16b
87 umull2 v15.8h, v7.16b, v3.16b
127 umull2 v12.8h, v7.16b, v8.16b
129 umull2 v13.8h, v7.16b, v9.16b
131 umull2 v14.8h, v7.16b, v10.16b
133 umull2 v15.8h, v7.16b, v11.16b
171 umull2 v12.8h, v3.16b, v8.16b
173 umull2 v13.8h, v3.16b, v9.16
[all...] |
| rsCpuIntrinsics_advsimd_YuvToRGB.S | 67 umull2 v5.8h, v8.16b, v24.16b // g0_hi = y0_hi * 149
68 umull2 v21.8h, v9.16b, v24.16b // g1_hi = y1_hi * 149
72 umull2 v9.8h, \regu\().16b, v25.16b // g2_hi = u_hi * 50 + v_hi * 104
93 umull2 v14.8h, \regv\().16b, v27.16b // r2_hi = v_hi * 204
94 umull2 v15.8h, \regu\().16b, v28.16b // b2_hi = u_hi * 254
|
| rsCpuIntrinsics_advsimd_Blur.S | 100 umull2 v13.4s, v14.8h, v0.h[0]
104 umull2 v15.4s, v15.8h, v0.h[0]
266 umull2 v15.4s, v9.8h, v0.h[0]
340 umull2 v15.4s, v8.8h, v0.h[0]
475 umull2 v15.4s, v12.8h, v0.h[0]
676 umull2 v15.4s, v7.8h, v0.h[0]
730 umull2 v15.4s, v4.8h, v0.h[0]
[all...] |
| rsCpuIntrinsics_advsimd_Resize.S | 61 umull2 v13.4s, v9.8h, v3.h[1]
|
| /external/capstone/suite/MC/AArch64/ |
| neon-2velem.s.cs | 93 0x20,0xa0,0x62,0x6f = umull2 v0.4s, v1.8h, v2.h[2]
94 0x20,0xa8,0x82,0x6f = umull2 v0.2d, v1.4s, v2.s[2]
95 0x20,0xa8,0x96,0x6f = umull2 v0.2d, v1.4s, v22.s[2]
|
| neon-3vdiff.s.cs | 83 0x20,0xc0,0x22,0x6e = umull2 v0.8h, v1.16b, v2.16b
84 0x20,0xc0,0x62,0x6e = umull2 v0.4s, v1.8h, v2.8h
85 0x20,0xc0,0xa2,0x6e = umull2 v0.2d, v1.4s, v2.4s
|
| /external/llvm/test/MC/AArch64/ |
| neon-2velem.s | 236 umull2 v0.4s, v1.8h, v2.h[2]
237 umull2 v0.2d, v1.4s, v2.s[2]
238 umull2 v0.2d, v1.4s, v22.s[2]
243 // CHECK: umull2 v0.4s, v1.8h, v2.h[2] // encoding: [0x20,0xa0,0x62,0x6f]
244 // CHECK: umull2 v0.2d, v1.4s, v2.s[2] // encoding: [0x20,0xa8,0x82,0x6f]
245 // CHECK: umull2 v0.2d, v1.4s, v22.s[2] // encoding: [0x20,0xa8,0x96,0x6f]
|
| neon-3vdiff.s | 233 umull2 v0.8h, v1.16b, v2.16b
234 umull2 v0.4s, v1.8h, v2.8h
235 umull2 v0.2d, v1.4s, v2.4s
237 // CHECK: umull2 v0.8h, v1.16b, v2.16b // encoding: [0x20,0xc0,0x22,0x6e]
238 // CHECK: umull2 v0.4s, v1.8h, v2.8h // encoding: [0x20,0xc0,0x62,0x6e]
239 // CHECK: umull2 v0.2d, v1.4s, v2.4s // encoding: [0x20,0xc0,0xa2,0x6e]
|
| neon-diagnostics.s | [all...] |
| arm64-advsimd.s | [all...] |
| /external/libjpeg-turbo/simd/ |
| jsimd_arm64_neon.S | [all...] |
| /external/vixl/src/aarch64/ |
| assembler-aarch64.h | [all...] |
| macro-assembler-aarch64.h | [all...] |
| simulator-aarch64.h | [all...] |
| logic-aarch64.cc | 925 LogicVRegister Simulator::umull2(VectorFormat vform, function in class:vixl::aarch64::Simulator
933 return umull2(vform, dst, src1, dup_element(indexform, temp, src2, index));
3135 LogicVRegister Simulator::umull2(VectorFormat vform, function in class:vixl::aarch64::Simulator
[all...] |
| simulator-aarch64.cc | [all...] |
| assembler-aarch64.cc | [all...] |
| /external/vixl/test/aarch64/ |
| test-trace-aarch64.cc | [all...] |
| /external/valgrind/none/tests/arm64/ |
| fp_and_simd.stdout.exp | [all...] |
