| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/s390/ |
| zarch-z13.s | 4 vgef %v15,4000(%r6,%r9),13
5 vgeg %v15,4000(%r6,%r9),13
6 vgbm %v15,65533
7 vzero %v15
8 vone %v15
9 vgm %v15,253,252,11
10 vgmb %v15,253,252
11 vgmh %v15,253,252
12 vgmf %v15,253,252
13 vgmg %v15,253,25
[all...] |
| zarch-z13.d | 10 .*: e7 f6 9f a0 d0 13 [ ]*vgef %v15,4000\(%v6,%r9\),13
11 .*: e7 f6 9f a0 d0 12 [ ]*vgeg %v15,4000\(%v6,%r9\),13
12 .*: e7 f0 ff fd 00 44 [ ]*vgbm %v15,65533
13 .*: e7 f0 00 00 00 44 [ ]*vzero %v15
14 .*: e7 f0 ff ff 00 44 [ ]*vone %v15
15 .*: e7 f0 fd fc b0 46 [ ]*vgm %v15,253,252,11
16 .*: e7 f0 fd fc 00 46 [ ]*vgmb %v15,253,252
17 .*: e7 f0 fd fc 10 46 [ ]*vgmh %v15,253,252
18 .*: e7 f0 fd fc 20 46 [ ]*vgmf %v15,253,252
19 .*: e7 f0 fd fc 30 46 [ ]*vgmg %v15,253,25
[all...] |
| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/aarch64/ |
| movi.d | 264 400: 6f00e40f movi v15.2d, #0x0
265 404: 6f00e42f movi v15.2d, #0xff
266 408: 6f00e44f movi v15.2d, #0xff00
267 40c: 6f00e46f movi v15.2d, #0xffff
268 410: 6f00e48f movi v15.2d, #0xff0000
269 414: 6f00e4af movi v15.2d, #0xff00ff
270 418: 6f00e4cf movi v15.2d, #0xffff00
271 41c: 6f00e4ef movi v15.2d, #0xffffff
272 420: 6f00e50f movi v15.2d, #0xff000000
273 424: 6f00e52f movi v15.2d, #0xff0000f
[all...] |
| crypto.s | 40 sha1su0 v7.4s, v15.4s, v31.4s
43 sha256su1 v7.4s, v15.4s, v31.4s
45 pmull v7.8h, v15.8b, v31.8b
46 pmull v7.1q, v15.1d, v31.1d
47 pmull2 v7.8h, v15.16b, v31.16b
48 pmull2 v7.1q, v15.2d, v31.2d
|
| movi.s | 28 all_64bit_mask_movi v15.2d
41 all_8bit_imm_movi v15.\T, 0, 63
42 all_8bit_imm_movi v15.\T, 64, 127
43 all_8bit_imm_movi v15.\T, 128, 191
44 all_8bit_imm_movi v15.\T, 192, 255
77 all_8bit_imm_movi v15.\T, 0, 63
78 all_8bit_imm_movi v15.\T, 64, 127
79 all_8bit_imm_movi v15.\T, 128, 191
80 all_8bit_imm_movi v15.\T, 192, 255
93 all_8bit_imm_movi v15.\T, 0, 6
[all...] |
| crypto-directive.d | 20 28: 5e1f31e7 sha1su0 v7.4s, v15.4s, v31.4s
23 34: 5e1f61e7 sha256su1 v7.4s, v15.4s, v31.4s
24 38: 0e3fe1e7 pmull v7.8h, v15.8b, v31.8b
25 3c: 0effe1e7 pmull v7.1q, v15.1d, v31.1d
26 40: 4e3fe1e7 pmull2 v7.8h, v15.16b, v31.16b
27 44: 4effe1e7 pmull2 v7.1q, v15.2d, v31.2d
|
| crypto.d | 19 28: 5e1f31e7 sha1su0 v7.4s, v15.4s, v31.4s
22 34: 5e1f61e7 sha256su1 v7.4s, v15.4s, v31.4s
23 38: 0e3fe1e7 pmull v7.8h, v15.8b, v31.8b
24 3c: 0effe1e7 pmull v7.1q, v15.1d, v31.1d
25 40: 4e3fe1e7 pmull2 v7.8h, v15.16b, v31.16b
26 44: 4effe1e7 pmull2 v7.1q, v15.2d, v31.2d
|
| /external/llvm/test/MC/AArch64/ |
| optional-hash.s | 12 // CHECK: cmgt v0.8b, v15.8b, #0
13 cmgt v0.8b, v15.8b, 0
|
| neon-simd-ldst-multi-elem.s | 9 st1 { v15.8h }, [x15]
13 st1 { v15.4h }, [x15]
17 // CHECK: st1 { v15.8h }, [x15] // encoding: [0xef,0x75,0x00,0x4c]
21 // CHECK: st1 { v15.4h }, [x15] // encoding: [0xef,0x75,0x00,0x0c]
29 st1 { v15.8h, v16.8h }, [x15]
33 st1 { v15.4h, v16.4h }, [x15]
37 // CHECK: st1 { v15.8h, v16.8h }, [x15] // encoding: [0xef,0xa5,0x00,0x4c]
41 // CHECK: st1 { v15.4h, v16.4h }, [x15] // encoding: [0xef,0xa5,0x00,0x0c]
46 st1 { v15.8h-v16.8h }, [x15]
50 st1 { v15.4h-v16.4h }, [x15
[all...] |
| neon-facge-facgt.s | 10 facge v4.8h, v7.8h, v15.8h
12 facge v4.4s, v7.4s, v15.4s
15 facle v4.8h, v15.8h, v7.8h
17 facle v4.4s, v15.4s, v7.4s
21 // CHECK: facge v4.8h, v7.8h, v15.8h // encoding: [0xe4,0x2c,0x4f,0x6e]
23 // CHECK: facge v4.4s, v7.4s, v15.4s // encoding: [0xe4,0xec,0x2f,0x6e]
26 // CHECK: facge v4.8h, v7.8h, v15.8h // encoding: [0xe4,0x2c,0x4f,0x6e]
28 // CHECK: facge v4.4s, v7.4s, v15.4s // encoding: [0xe4,0xec,0x2f,0x6e]
39 facgt v17.2d, v15.2d, v13.2d
44 faclt v17.2d, v13.2d, v15.2
[all...] |
| neon-frsqrt-frecp.s | 9 frsqrts v4.8h, v7.8h, v15.8h
11 frsqrts v4.4s, v7.4s, v15.4s
15 // CHECK: frsqrts v4.8h, v7.8h, v15.8h // encoding: [0xe4,0x3c,0xcf,0x4e]
17 // CHECK: frsqrts v4.4s, v7.4s, v15.4s // encoding: [0xe4,0xfc,0xaf,0x4e]
27 frecps v17.2d, v15.2d, v13.2d
33 // CHECK: frecps v17.2d, v15.2d, v13.2d // encoding: [0xf1,0xfd,0x6d,0x4e]
|
| neon-scalar-by-elem-saturating-mul.s | 9 sqdmull s31, h31, v15.h[7]
12 sqdmull d9, s10, v15.s[0]
18 // CHECK: sqdmull s31, h31, v15.h[7] // encoding: [0xff,0xbb,0x7f,0x5f]
21 // CHECK: sqdmull d9, s10, v15.s[0] // encoding: [0x49,0xb1,0x8f,0x5f]
29 sqdmulh h20, h21, v15.h[7]
35 // CHECK: sqdmulh h20, h21, v15.h[7] // encoding: [0xb4,0xca,0x7f,0x5f]
45 sqrdmulh h21, h22, v15.h[7]
51 // CHECK: sqrdmulh h21, h22, v15.h[7] // encoding: [0xd5,0xda,0x7f,0x5f]
|
| neon-compare-instructions.s | 9 cmeq v0.8b, v15.8b, v17.8b
11 cmeq v15.4h, v16.4h, v17.4h
17 // CHECK: cmeq v0.8b, v15.8b, v17.8b // encoding: [0xe0,0x8d,0x31,0x2e]
19 // CHECK: cmeq v15.4h, v16.4h, v17.4h // encoding: [0x0f,0x8e,0x71,0x2e]
31 cmhs v0.8b, v15.8b, v17.8b
33 cmhs v15.4h, v16.4h, v17.4h
39 cmls v0.8b, v17.8b, v15.8b
41 cmls v15.4h, v17.4h, v16.4h
47 // CHECK: cmhs v0.8b, v15.8b, v17.8b // encoding: [0xe0,0x3d,0x31,0x2e]
49 // CHECK: cmhs v15.4h, v16.4h, v17.4h // encoding: [0x0f,0x3e,0x71,0x2e
[all...] |
| neon-simd-ldst-one-elem.s | 9 ld1r { v15.8h }, [x15]
13 ld1r { v15.4h }, [x15]
17 // CHECK: ld1r { v15.8h }, [x15] // encoding: [0xef,0xc5,0x40,0x4d]
21 // CHECK: ld1r { v15.4h }, [x15] // encoding: [0xef,0xc5,0x40,0x0d]
30 ld2r { v15.8h, v16.8h }, [x15]
34 ld2r { v15.4h, v16.4h }, [x15]
38 // CHECK: ld2r { v15.8h, v16.8h }, [x15] // encoding: [0xef,0xc5,0x60,0x4d]
42 // CHECK: ld2r { v15.4h, v16.4h }, [x15] // encoding: [0xef,0xc5,0x60,0x0d]
47 ld3r { v15.8h, v16.8h, v17.8h }, [x15]
51 ld3r { v15.4h, v16.4h, v17.4h }, [x15
[all...] |
| neon-simd-post-ldst-multi-elem.s | 9 ld1 { v15.8h }, [x15], x2
13 ld1 { v15.4h }, [x15], x3
18 // CHECK: ld1 { v15.8h }, [x15], x2
26 // CHECK: ld1 { v15.4h }, [x15], x3
38 ld1 { v15.8h, v16.8h }, [x15], x2
42 ld1 { v15.4h, v16.4h }, [x15], x3
47 // CHECK: ld1 { v15.8h, v16.8h }, [x15], x2
55 // CHECK: ld1 { v15.4h, v16.4h }, [x15], x3
67 ld1 { v15.8h, v16.8h, v17.8h }, [x15], x2
71 ld1 { v15.4h, v16.4h, v17.4h }, [x15], x
[all...] |
| /external/capstone/suite/MC/AArch64/ |
| neon-facge-facgt.s.cs | 3 0xe4,0xec,0x2f,0x6e = facge v4.4s, v7.4s, v15.4s
6 0xe4,0xec,0x2f,0x6e = facge v4.4s, v7.4s, v15.4s
10 0xf1,0xed,0xed,0x6e = facgt v17.2d, v15.2d, v13.2d
13 0xf1,0xed,0xed,0x6e = facgt v17.2d, v15.2d, v13.2d
|
| neon-frsqrt-frecp.s.cs | 3 0xe4,0xfc,0xaf,0x4e = frsqrts v4.4s, v7.4s, v15.4s
7 0xf1,0xfd,0x6d,0x4e = frecps v17.2d, v15.2d, v13.2d
|
| neon-compare-instructions.s.cs | 2 0xe0,0x8d,0x31,0x2e = cmeq v0.8b, v15.8b, v17.8b
4 0x0f,0x8e,0x71,0x2e = cmeq v15.4h, v16.4h, v17.4h
9 0xe0,0x3d,0x31,0x2e = cmhs v0.8b, v15.8b, v17.8b
11 0x0f,0x3e,0x71,0x2e = cmhs v15.4h, v16.4h, v17.4h
16 0xe0,0x3d,0x31,0x2e = cmhs v0.8b, v15.8b, v17.8b
18 0x0f,0x3e,0x71,0x2e = cmhs v15.4h, v16.4h, v17.4h
23 0xe0,0x3d,0x31,0x0e = cmge v0.8b, v15.8b, v17.8b
25 0x0f,0x3e,0x71,0x0e = cmge v15.4h, v16.4h, v17.4h
30 0xe0,0x3d,0x31,0x0e = cmge v0.8b, v15.8b, v17.8b
32 0x0f,0x3e,0x71,0x0e = cmge v15.4h, v16.4h, v17.4
[all...] |
| neon-simd-post-ldst-multi-elem.s.cs | 3 0xef,0x75,0xc2,0x4c = ld1 {v15.8h}, [x15], x2
7 0xef,0x75,0xc3,0x0c = ld1 {v15.4h}, [x15], x3
11 0xef,0xa5,0xc2,0x4c = ld1 {v15.8h, v16.8h}, [x15], x2
15 0xef,0xa5,0xc3,0x0c = ld1 {v15.4h, v16.4h}, [x15], x3
19 0xef,0x65,0xc2,0x4c = ld1 {v15.8h, v16.8h, v17.8h}, [x15], x2
23 0xef,0x65,0xc3,0x0c = ld1 {v15.4h, v16.4h, v17.4h}, [x15], x3
27 0xef,0x25,0xc2,0x4c = ld1 {v15.8h, v16.8h, v17.8h, v18.8h}, [x15], x2
31 0xef,0x25,0xc4,0x0c = ld1 {v15.4h, v16.4h, v17.4h, v18.4h}, [x15], x4
35 0xef,0x85,0xc2,0x4c = ld2 {v15.8h, v16.8h}, [x15], x2
39 0xef,0x85,0xc3,0x0c = ld2 {v15.4h, v16.4h}, [x15], x
[all...] |
| neon-scalar-by-elem-saturating-mul.s.cs | 5 0xff,0xbb,0x7f,0x5f = sqdmull s31, h31, v15.h[7]
8 0x49,0xb1,0x8f,0x5f = sqdmull d9, s10, v15.s[0]
11 0xb4,0xca,0x7f,0x5f = sqdmulh h20, h21, v15.h[7]
16 0xd5,0xda,0x7f,0x5f = sqrdmulh h21, h22, v15.h[7]
|
| neon-simd-ldst-one-elem.s.cs | 3 0xef,0xc5,0x40,0x4d = ld1r {v15.8h}, [x15]
7 0xef,0xc5,0x40,0x0d = ld1r {v15.4h}, [x15]
11 0xef,0xc5,0x60,0x4d = ld2r {v15.8h, v16.8h}, [x15]
15 0xef,0xc5,0x60,0x0d = ld2r {v15.4h, v16.4h}, [x15]
19 0xef,0xe5,0x40,0x4d = ld3r {v15.8h, v16.8h, v17.8h}, [x15]
23 0xef,0xe5,0x40,0x0d = ld3r {v15.4h, v16.4h, v17.4h}, [x15]
27 0xef,0xe5,0x60,0x4d = ld4r {v15.8h, v16.8h, v17.8h, v18.8h}, [x15]
31 0xef,0xe5,0x60,0x0d = ld4r {v15.4h, v16.4h, v17.4h, v18.4h}, [x15]
35 0xef,0x59,0x40,0x4d = ld1 {v15.h}[7], [x15]
39 0xef,0x59,0x60,0x4d = ld2 {v15.h, v16.h}[7], [x15
[all...] |
| /frameworks/rs/cpu_ref/ |
| rsCpuIntrinsics_advsimd_Blur.S | 80 * v12-v15 = temporary sums
85 ld1 {v15.16b}, [x1], #16
88 uxtl v14.8h, v15.8b
90 uxtl2 v15.8h, v15.16b
102 umull v14.4s, v15.4h, v0.h[0]
104 umull2 v15.4s, v15.8h, v0.h[0]
126 umlal2 v15.4s, v11.8h, \dreg
152 umlal2 v15.4s, v11.8h, \dre
[all...] |
| rsCpuIntrinsics_advsimd_ColorMatrix.S | 83 vmxx_s16 \i, 8, v6.4s, v15.4h, v1.h[4]
87 vmxx2_s16 \i, 8, v7.4s, v15.8h, v1.h[4]
100 vmxx_s16 \i^31, 8, v6.4s, v15.4h, v1.h[4]
104 vmxx2_s16 \i^31, 8, v7.4s, v15.8h, v1.h[4]
118 vmxx_s16 \i, 8, v6.4s, v15.4h, v1.h[5]
122 vmxx2_s16 \i, 8, v7.4s, v15.8h, v1.h[5]
135 vmxx_s16 \i^31, 8, v6.4s, v15.4h, v1.h[5]
139 vmxx2_s16 \i^31, 8, v7.4s, v15.8h, v1.h[5]
153 vmxx_s16 \i, 8, v6.4s, v15.4h, v1.h[6]
157 vmxx2_s16 \i, 8, v7.4s, v15.8h, v1.h[6
[all...] |
| /cts/tools/vm-tests-tf/src/dot/junit/opcodes/instance_of/d/ |
| T_instance_of_2.d | 65 instance-of v15, v10, dot/junit/opcodes/instance_of/d/T_instance_of_2/SuperClass
66 if-eqz v15, LabelExit
71 instance-of v15, v10, [Ldot/junit/opcodes/instance_of/d/T_instance_of_2/SuperClass;
72 if-eqz v15, LabelExit
76 instance-of v15, v10, java/lang/Object
77 if-eqz v15, LabelExit
82 instance-of v15, v10, dot/junit/opcodes/instance_of/d/T_instance_of_2/SuperInterface
83 if-eqz v15, LabelExit
88 instance-of v15, v10, dot/junit/opcodes/instance_of/d/T_instance_of_2/SubClass
89 if-nez v15, LabelExi
[all...] |
| /external/llvm/test/MC/Hexagon/ |
| v60lookup.s | 5 V31.b = vlut32(V29.b, V15.b, R1)
6 # CHECK: 1b79fd3f { v31.b = vlut32(v29.b,v15.b,r1) }
7 V31.b |= vlut32(V29.b, V15.b, R2)
8 # CHECK: 1b7afdbf { v31.b |= vlut32(v29.b,v15.b,r2) }
9 V31:30.h = vlut16(V29.b, V15.h, R3)
10 # CHECK: 1b7bfdde { v31:30.h = vlut16(v29.b,v15.h,r3) }
|
