| /external/llvm/test/MC/AMDGPU/ |
| vop3-errs.s | 7 v_div_scale_f32 v24, vcc, v22, 1.1, v22
|
| vop3.s | 333 v_div_scale_f32 v24, vcc, v22, v22, v20
334 // SICI: v_div_scale_f32 v24, vcc, v22, v22, v20 ; encoding: [0x18,0x6a,0xda,0xd2,0x16,0x2d,0x52,0x04]
335 // VI: v_div_scale_f32 v24, vcc, v22, v22, v20 ; encoding: [0x18,0x6a,0xe0,0xd1,0x16,0x2d,0x52,0x04]
337 v_div_scale_f32 v24, vcc, s[10:11], v22, v20
338 // SICI: v_div_scale_f32 v24, vcc, s[10:11], v22, v20 ; encoding: [0x18,0x6a,0xda,0xd2,0x0a,0x2c,0x52,0x04]
339 // VI: v_div_scale_f32 v24, vcc, s[10:11], v22, v20 ; encoding: [0x18,0x6a,0xe0,0xd1,0x0a,0x2c,0x52,0x04]
341 v_div_scale_f32 v24, s[10:11], v22, v22, v20
342 // SICI: v_div_scale_f32 v24, s[10:11], v22, v22, v20 ; encoding: [0x18,0x0a,0xda,0xd2,0x16,0x2d,0x52,0x04]
343 // VI: v_div_scale_f32 v24, s[10:11], v22, v22, v20 ; encoding: [0x18,0x0a,0xe0,0xd1,0x16,0x2d,0x52,0x04]
345 v_div_scale_f32 v24, vcc, v22, 1.0, v2
[all...] |
| /external/libavc/common/armv8/ |
| ih264_inter_pred_luma_horz_hpel_vert_hpel_av8.s | 83 movi v24.8h, #0x5 // Filter coeff 5 into Q12
118 uaddl v24.8h, v5.8b, v7.8b
121 mla v20.8h, v24.8h , v28.8h
122 uaddl v24.8h, v14.8b, v15.8b
127 mla v22.8h, v24.8h , v28.8h
130 ext v24.16b, v18.16b , v20.16b , #4
134 add v0.8h, v24.8h , v26.8h
135 ext v24.16b, v18.16b , v20.16b , #2
137 add v24.8h, v24.8h , v26.8
[all...] |
| ih264_inter_pred_luma_horz_qpel_vert_qpel_av8.s | 157 uaddl v24.8h, v0.8b, v10.8b
158 umlal v24.8h, v4.8b, v30.8b
159 umlal v24.8h, v6.8b, v30.8b
160 umlsl v24.8h, v2.8b, v31.8b
161 umlsl v24.8h, v8.8b, v31.8b
167 sqrshrun v26.8b, v24.8h, #5
174 uaddl v24.8h, v1.8b, v11.8b
175 umlal v24.8h, v5.8b, v30.8b
176 umlal v24.8h, v7.8b, v30.8b
177 umlsl v24.8h, v3.8b, v31.8
[all...] |
| ih264_inter_pred_luma_horz_qpel_vert_hpel_av8.s | 144 movi v24.8h, #0x5 // Filter coeff 5 into Q12
180 uaddl v24.8h, v5.8b, v7.8b
183 mla v20.8h, v24.8h , v28.8h
184 uaddl v24.8h, v14.8b, v15.8b
189 mla v22.8h, v24.8h , v28.8h
193 ext v24.16b, v18.16b , v20.16b , #4
197 add v0.8h, v24.8h , v26.8h
198 ext v24.16b, v18.16b , v20.16b , #2
200 add v24.8h, v24.8h , v26.8
[all...] |
| ih264_inter_pred_chroma_av8.s | 175 umull v24.8h, v5.8b, v28.8b
177 umlal v24.8h, v8.8b, v29.8b
179 umlal v24.8h, v10.8b, v30.8b
181 umlal v24.8h, v13.8b, v31.8b
184 sqrshrun v18.8b, v24.8h, #6
195 umull v24.8h, v11.8b, v28.8b
197 umlal v24.8h, v14.8b, v29.8b
199 umlal v24.8h, v1.8b, v30.8b
201 umlal v24.8h, v4.8b, v31.8b
203 sqrshrun v27.8b, v24.8h, #
[all...] |
| ih264_resi_trans_quant_av8.s | 96 ld1 {v24.8b}, [x0] //load first 8 pix src row 4
102 usubl v6.8h, v24.8b, v25.8b //find residue row 4
150 add v24.4h, v18.4h , v19.4h //x5 = x0 + x1;
157 st1 {v24.h}[0], [x10] //store the dc value to alternate dc sddress
161 abs v0.4h, v24.4h //abs val of row 1
166 cmgt v4.4h, v24.4h, #0
181 dup v24.4s, w7
183 sshl v20.4s, v20.4s, v24.4s //shift row 1
184 sshl v21.4s, v21.4s, v24.4s //shift row 2
185 sshl v22.4s, v22.4s, v24.4s //shift row
[all...] |
| ih264_inter_pred_filters_luma_vert_av8.s | 122 movi v24.8h, #5 // Filter coeff 0x4 into Q12
149 mls v14.8h, v16.8h , v24.8h // temp -= temp2 * 5
153 mls v20.8h, v26.8h , v24.8h // temp4 -= temp5 * 5
160 mls v16.8h, v18.8h , v24.8h
168 mls v14.8h, v26.8h , v24.8h
174 mls v18.8h, v20.8h , v24.8h
182 mls v16.8h, v26.8h , v24.8h
189 mls v14.8h, v20.8h , v24.8h
192 mls v18.8h, v26.8h , v24.8h
209 mls v14.8h, v16.8h , v24.8h // temp -= temp2 *
[all...] |
| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/s390/ |
| zarch-z13.s | 76 vperm %v15,%v17,%v20,%v24
90 vsel %v15,%v17,%v20,%v24
130 vac %v15,%v17,%v20,%v24,13
131 vacq %v15,%v17,%v20,%v24
132 vaccc %v15,%v17,%v20,%v24,13
133 vacccq %v15,%v17,%v20,%v24
200 vgfma %v15,%v17,%v20,%v24,13
201 vgfmab %v15,%v17,%v20,%v24
202 vgfmah %v15,%v17,%v20,%v24
203 vgfmaf %v15,%v17,%v20,%v24
[all...] |
| zarch-z13.d | 82 .*: e7 f1 40 00 87 8c [ ]*vperm %v15,%v17,%v20,%v24
96 .*: e7 f1 40 00 87 8d [ ]*vsel %v15,%v17,%v20,%v24
136 .*: e7 f1 4d 00 87 bb [ ]*vac %v15,%v17,%v20,%v24,13
137 .*: e7 f1 44 00 87 bb [ ]*vacq %v15,%v17,%v20,%v24
138 .*: e7 f1 4d 00 87 b9 [ ]*vaccc %v15,%v17,%v20,%v24,13
139 .*: e7 f1 44 00 87 b9 [ ]*vacccq %v15,%v17,%v20,%v24
206 .*: e7 f1 4d 00 87 bc [ ]*vgfma %v15,%v17,%v20,%v24,13
207 .*: e7 f1 40 00 87 bc [ ]*vgfmab %v15,%v17,%v20,%v24
208 .*: e7 f1 41 00 87 bc [ ]*vgfmah %v15,%v17,%v20,%v24
209 .*: e7 f1 42 00 87 bc [ ]*vgfmaf %v15,%v17,%v20,%v24
[all...] |
| /external/libxaac/decoder/armv8/ |
| ixheaacd_post_twiddle.s | 153 uMULL v24.4s, v0.4h, v12.4h
158 ushR v24.4s, v24.4s, #16
163 sMLAL v24.4s, v1.4h, v12.4h
169 SUB v30.4s, v30.4s , v24.4s
179 mov v24.8b, v28.8b
189 mov v31.8B , v24.8B
190 UZP1 v24.4h, v31.4h, v25.4h
204 uMULL v2.4s, v24.4h, v10.4h
258 ADD v24.4s, v20.4s , v4.4
[all...] |
| ixheaacd_post_twiddle_overlap.s | 363 uMULL v24.4s, v2.4h, v9.4h
397 ushR v24.4s, v24.4s, #16
400 sMLAL v24.4s, v3.4h, v9.4h
409 SUB v28.4s, v24.4s , v26.4s
413 mov v24.16b, v28.16b
417 UZP1 v19.8h, v24.8h, v24.8h
418 UZP2 v21.8h, v24.8h, v24.8
[all...] |
| /external/libmpeg2/common/armv8/ |
| icv_variance_av8.s | 88 umull v24.8h, v2.8b, v2.8b
92 uaddl v25.4s, v24.4h, v26.4h
94 uaddl2 v24.4s, v24.8h, v26.8h
97 add v22.4s, v24.4s, v25.4s
|
| /external/libhevc/common/arm64/ |
| ihevc_intra_pred_luma_vert.s | 188 dup v24.16b,w12 //src[2nt+1]
213 sqxtun v24.8b, v28.8h
214 sqxtun2 v24.16b, v0.8h
218 rev64 v24.16b, v24.16b
219 mov v25.d[0], v24.d[1]
223 bsl v18.8b, v24.8b , v16.8b //only select row values from q12(predpixel)
239 bsl v1.8b, v24.8b , v16.8b
264 bsl v18.8b, v24.8b , v16.8b //only select row values from q12(predpixel)
277 bsl v1.8b, v24.8b , v16.8
[all...] |
| ihevc_inter_pred_chroma_vert_w16inp.s | 224 smull v24.4s, v3.4h, v16.4h //vmull_s16(src_tmp2, coeff_0)
226 smlal v24.4s, v4.4h, v17.4h
228 smlal v24.4s, v5.4h, v18.4h
230 smlal v24.4s, v6.4h, v19.4h
248 sqshrn v24.4h, v24.4s,#6 //right shift
263 sqrshrun v24.8b, v24.8h,#6 //rounding shift
269 st1 {v24.s}[0],[x9] //stores the loaded value
279 smull v24.4s, v3.4h, v16.4h //vmull_s16(src_tmp2, coeff_0
[all...] |
| ihevc_intra_pred_luma_horz.s | 209 usubl v24.8h, v30.8b, v28.8b
212 sshr v24.8h, v24.8h,#1
215 sqadd v22.8h, v26.8h , v24.8h
223 usubl v24.8h, v31.8b, v28.8b
226 sshr v24.8h, v24.8h,#1
229 sqadd v22.8h, v26.8h , v24.8h
291 usubl v24.8h, v30.8b, v28.8b
294 sshr v24.8h, v24.8h,#
[all...] |
| ihevc_itrans_recon_8x8.s | 192 smull v24.4s, v6.4h, v0.h[1] //// y1 * cos1(part of b0)
200 smlal v24.4s, v7.4h, v0.h[3] //// y1 * cos1 + y3 * cos3(part of b0)
234 smlal v24.4s, v14.4h, v1.h[1] //// y1 * cos1 + y3 * cos3 + y5 * sin3(part of b0)
245 smlal v24.4s, v15.4h, v1.h[3] //// b0 = y1 * cos1 + y3 * cos3 + y5 * sin3 + y7 * sin1(part of x0,x7)
255 add v20.4s, v14.4s , v24.4s //// a0 + b0(part of x0)
256 sub v6.4s, v14.4s , v24.4s //// a0 - b0(part of x7)
258 add v24.4s, v22.4s , v28.4s //// a2 + b2(part of x2)
269 sqrshrn v3.4h, v24.4s,#shift_stage1_idct //// x2 = (a2 + b2 + rnd) >> 7(shift_stage1_idct)
304 smull v24.4s, v6.4h, v0.h[1] //// y1 * cos1(part of b0)
309 smlal v24.4s, v7.4h, v0.h[3] //// y1 * cos1 + y3 * cos3(part of b0
[all...] |
| ihevc_itrans_recon_32x32.s | 216 smull v24.4s, v8.4h, v0.h[1] //// y1 * cos1(part of b0)
221 smlal v24.4s, v9.4h, v0.h[3] //// y1 * cos1 + y3 * cos3(part of b0)
256 smlal v24.4s, v14.4h, v1.h[1]
262 smlal v24.4s, v15.4h, v1.h[3]
286 smlal v24.4s, v8.4h, v2.h[1] //// y1 * cos1(part of b0)
291 smlal v24.4s, v9.4h, v2.h[3] //// y1 * cos1 + y3 * cos3(part of b0)
330 smlal v24.4s, v14.4h, v3.h[1]
336 smlal v24.4s, v15.4h, v3.h[3]
362 smlal v24.4s, v8.4h, v4.h[1] //// y1 * cos1(part of b0)
367 smlal v24.4s, v9.4h, v4.h[3] //// y1 * cos1 + y3 * cos3(part of b0
[all...] |
| ihevc_inter_pred_chroma_vert.s | 268 umull v24.8h, v16.8b, v1.8b
270 umlsl v24.8h, v7.8b, v0.8b
273 umlal v24.8h, v17.8b, v2.8b
275 umlsl v24.8h, v18.8b, v3.8b
300 sqrshrun v24.8b, v24.8h,#6
308 st1 {v24.8b},[x7],x3 //stores the loaded value
337 umull v24.8h, v16.8b, v1.8b
348 umlsl v24.8h, v7.8b, v0.8b
351 umlal v24.8h, v17.8b, v2.8
[all...] |
| ihevc_inter_pred_chroma_vert_w16inp_w16out.s | 222 smull v24.4s, v3.4h, v16.4h //vmull_s16(src_tmp2, coeff_0)
224 smlal v24.4s, v4.4h, v17.4h
226 smlal v24.4s, v5.4h, v18.4h
228 smlal v24.4s, v6.4h, v19.4h
245 sqshrn v24.4h, v24.4s,#6 //right shift
264 st1 {v24.2s},[x9] //stores the loaded value
273 smull v24.4s, v3.4h, v16.4h //vmull_s16(src_tmp2, coeff_0)
275 smlal v24.4s, v4.4h, v17.4h
278 smlal v24.4s, v5.4h, v18.4
[all...] |
| /external/libavc/encoder/armv8/ |
| ih264e_half_pel_av8.s | 178 sqrshrun v24.8b, v16.8h, #5 //// (a0 + a5 + 20a2 + 20a3 - 5a1 - 5a4 + 16) >> 5 (column2,row1)
183 st1 {v23.8b, v24.8b}, [x1], #16 ////Store dest row1
324 uaddl v24.8h, v4.8b, v19.8b //// a0 + a5 (column3,row0)
326 umlal v24.8h, v10.8b, v1.8b //// a0 + a5 + 20a2 (column3,row0)
327 umlal v24.8h, v13.8b, v1.8b //// a0 + a5 + 20a2 + 20a3 (column3,row0)
328 umlsl v24.8h, v7.8b, v31.8b //// a0 + a5 + 20a2 + 20a3 - 5a1 (column3,row0)
329 umlsl v24.8h, v16.8b, v31.8b //// a0 + a5 + 20a2 + 20a3 - 5a1 - 5a4 (column3,row0)
330 mov v25.d[0], v24.d[1]
345 sqrshrun v4.8b, v24.8h, #5 //// (a0 + a5 + 20a2 + 20a3 - 5a1 - 5a4 + 16) >> 5 (column3,row0)
354 ext v31.8b, v23.8b , v24.8b , #
[all...] |
| ih264e_evaluate_intra_chroma_modes_av8.s | 215 uabdl v24.8h, v1.8b, v29.8b
233 uabal v24.8h, v3.8b, v29.8b
249 uabal v24.8h, v5.8b, v29.8b
264 uabal v24.8h, v7.8b, v29.8b
285 uabal v24.8h, v1.8b, v31.8b
302 uabal v24.8h, v3.8b, v31.8b
319 uabal v24.8h, v5.8b, v31.8b
334 uabal v24.8h, v7.8b, v31.8b
361 add v24.8h, v22.8h , v24.8h ///D
[all...] |
| ih264e_evaluate_intra16x16_modes_av8.s | 183 uabdl v24.8h, v1.8b, v31.8b
204 uabal v24.8h, v3.8b, v31.8b
220 uabal v24.8h, v5.8b, v31.8b
236 uabal v24.8h, v7.8b, v31.8b
253 uabal v24.8h, v1.8b, v31.8b
269 uabal v24.8h, v3.8b, v31.8b
286 uabal v24.8h, v5.8b, v31.8b
303 uabal v24.8h, v7.8b, v31.8b
323 uabal v24.8h, v1.8b, v31.8b
340 uabal v24.8h, v3.8b, v31.8
[all...] |
| /external/llvm/test/MC/Hexagon/ |
| v60-permute.s | 20 #CHECK: 1ff1d81f { v31.h = vpack(v24.w{{ *}},{{ *}}v17.w):sat }
21 v31.h=vpack(v24.w,v17.w):sat
50 #CHECK: 1e01d8fe { v30.h = vshuff(v24.h) }
51 v30.h=vshuff(v24.h)
|
| v60-shift.s | 5 #CHECK: 198fd829 { v9.uw = vlsr(v24.uw,{{ *}}r15) }
6 v9.uw=vlsr(v24.uw,r15)
38 #CHECK: 1e02c2d8 { v24.h = vpopcount(v2.h) }
39 v24.h=vpopcount(v2.h)
|
