| /external/arm-neon-tests/ |
| ref_vcge.c | 26 #define INSN_NAME vcge
27 #define TEST_MSG "VCGE/VCGEQ"
|
| Android.mk | 25 vqsub vqdmulh_lane vqdmull vqdmlal vqdmlsl vceq vcge vcle \
|
| Makefile | 40 vqsub vqdmulh_lane vqdmull vqdmlal vqdmlsl vceq vcge vcle \
|
| /external/swiftshader/third_party/LLVM/test/MC/ARM/ |
| neon-cmp-encoding.s | 21 vcge.s8 d16, d16, d17
22 vcge.s16 d16, d16, d17
23 vcge.s32 d16, d16, d17
24 vcge.u8 d16, d16, d17
25 vcge.u16 d16, d16, d17
26 vcge.u32 d16, d16, d17
27 vcge.f32 d16, d16, d17
28 vcge.s8 q8, q8, q9
29 vcge.s16 q8, q8, q9
30 vcge.s32 q8, q8, q
[all...] |
| /external/capstone/suite/MC/ARM/ |
| neon-cmp-encoding.s.cs | 10 0xb1,0x03,0x40,0xf2 = vcge.s8 d16, d16, d17
11 0xb1,0x03,0x50,0xf2 = vcge.s16 d16, d16, d17
12 0xb1,0x03,0x60,0xf2 = vcge.s32 d16, d16, d17
13 0xb1,0x03,0x40,0xf3 = vcge.u8 d16, d16, d17
14 0xb1,0x03,0x50,0xf3 = vcge.u16 d16, d16, d17
15 0xb1,0x03,0x60,0xf3 = vcge.u32 d16, d16, d17
16 0xa1,0x0e,0x40,0xf3 = vcge.f32 d16, d16, d17
17 0xf2,0x03,0x40,0xf2 = vcge.s8 q8, q8, q9
18 0xf2,0x03,0x50,0xf2 = vcge.s16 q8, q8, q9
19 0xf2,0x03,0x60,0xf2 = vcge.s32 q8, q8, q
[all...] |
| neon-bitwise-encoding.s.cs | 113 0x56,0xa3,0x1a,0xf2 = vcge.s16 q5, q5, q3
114 0x13,0x53,0x15,0xf2 = vcge.s16 d5, d5, d3
117 0xca,0xa0,0xb5,0xf3 = vcge.s16 q5, q5, #0
118 0x85,0x50,0xb5,0xf3 = vcge.s16 d5, d5, #0
|
| /external/llvm/test/MC/ARM/ |
| neon-cmp-encoding.s | 21 vcge.s8 d16, d16, d17
22 vcge.s16 d16, d16, d17
23 vcge.s32 d16, d16, d17
24 vcge.u8 d16, d16, d17
25 vcge.u16 d16, d16, d17
26 vcge.u32 d16, d16, d17
27 vcge.f32 d16, d16, d17
28 vcge.s8 q8, q8, q9
29 vcge.s16 q8, q8, q9
30 vcge.s32 q8, q8, q
[all...] |
| fullfp16-neon.s | 88 vcge.f16 d2, d3, d4
89 vcge.f16 q2, q3, q4
90 @ ARM: vcge.f16 d2, d3, d4 @ encoding: [0x04,0x2e,0x13,0xf3]
91 @ ARM: vcge.f16 q2, q3, q4 @ encoding: [0x48,0x4e,0x16,0xf3]
92 @ THUMB: vcge.f16 d2, d3, d4 @ encoding: [0x13,0xff,0x04,0x2e]
93 @ THUMB: vcge.f16 q2, q3, q4 @ encoding: [0x16,0xff,0x48,0x4e]
95 vcge.f16 d2, d3, #0
96 vcge.f16 q2, q3, #0
97 @ ARM: vcge.f16 d2, d3, #0 @ encoding: [0x83,0x24,0xb5,0xf3]
98 @ ARM: vcge.f16 q2, q3, #0 @ encoding: [0xc6,0x44,0xb5,0xf3
[all...] |
| fullfp16-neon-neg.s | 66 vcge.f16 d2, d3, d4
67 vcge.f16 q2, q3, q4
71 vcge.f16 d2, d3, #0
72 vcge.f16 q2, q3, #0
|
| neon-bitwise-encoding.s | 313 vcge.s16 q5, q3
314 vcge.s16 d5, d3
319 vcge.s16 q5, #0
320 vcge.s16 d5, #0
366 @ CHECK: vcge.s16 q5, q5, q3 @ encoding: [0x56,0xa3,0x1a,0xf2]
367 @ CHECK: vcge.s16 d5, d5, d3 @ encoding: [0x13,0x53,0x15,0xf2]
372 @ CHECK: vcge.s16 q5, q5, #0 @ encoding: [0xca,0xa0,0xb5,0xf3]
373 @ CHECK: vcge.s16 d5, d5, #0 @ encoding: [0x85,0x50,0xb5,0xf3]
|
| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/arm/ |
| neon-psyn.s | 73 vcge d2.32, d3.f, d4.f
74 vcge d2.16, d3.s16, #0
|
| armv8-2-fp16-simd.d | 41 74: f3142e0e vcge.f16 d2, d4, d14
42 78: f3184e6c vcge.f16 q2, q4, q14
45 84: f31e2e04 vcge.f16 d2, d14, d4
46 88: f31c4ec8 vcge.f16 q2, q14, q4
54 a8: f3100eec vcge.f16 q0, q8, q14
56 b0: f31c0ee0 vcge.f16 q0, q14, q8
140 200: f3b5e482 vcge.f16 d14, d2, #0
141 204: f3f5c4c4 vcge.f16 q14, q2, #0
|
| neon-psyn.d | 35 0[0-9a-f]+ <[^>]+> f3032e04 vcge\.f32 d2, d3, d4
36 0[0-9a-f]+ <[^>]+> f3b52083 vcge\.s16 d2, d3, #0
|
| armv8-2-fp16-simd-thumb.d | 41 74: ff14 2e0e vcge.f16 d2, d4, d14
42 78: ff18 4e6c vcge.f16 q2, q4, q14
45 84: ff1e 2e04 vcge.f16 d2, d14, d4
46 88: ff1c 4ec8 vcge.f16 q2, q14, q4
54 a8: ff10 0eec vcge.f16 q0, q8, q14
56 b0: ff1c 0ee0 vcge.f16 q0, q14, q8
140 200: ffb5 e482 vcge.f16 d14, d2, #0
141 204: fff5 c4c4 vcge.f16 q14, q2, #0
|
| neon-omit.s | 38 vcge.u32 q7,q8
83 vcge.u32 q7,q8,q3
|
| neon-omit.d | 39 0[0-9a-f]+ <[^>]+> f32ee370 vcge\.u32 q7, q7, q8
41 0[0-9a-f]+ <[^>]+> f320e3de vcge\.u32 q7, q8, q7
81 0[0-9a-f]+ <[^>]+> f320e3d6 vcge\.u32 q7, q8, q3
83 0[0-9a-f]+ <[^>]+> f326e370 vcge\.u32 q7, q3, q8
|
| neon-cov.d | 557 0[0-9a-f]+ <[^>]+> f2000350 vcge\.s8 q0, q0, q0
558 0[0-9a-f]+ <[^>]+> f2000350 vcge\.s8 q0, q0, q0
559 0[0-9a-f]+ <[^>]+> f2000310 vcge\.s8 d0, d0, d0
560 0[0-9a-f]+ <[^>]+> f2100350 vcge\.s16 q0, q0, q0
561 0[0-9a-f]+ <[^>]+> f2100350 vcge\.s16 q0, q0, q0
562 0[0-9a-f]+ <[^>]+> f2100310 vcge\.s16 d0, d0, d0
563 0[0-9a-f]+ <[^>]+> f2200350 vcge\.s32 q0, q0, q0
564 0[0-9a-f]+ <[^>]+> f2200350 vcge\.s32 q0, q0, q0
565 0[0-9a-f]+ <[^>]+> f2200310 vcge\.s32 d0, d0, d0
566 0[0-9a-f]+ <[^>]+> f3000350 vcge\.u8 q0, q0, q
[all...] |
| armv8-2-fp16-simd.s | 28 .irp op, vacge.f16, vacgt.f16, vaclt.f16, vacle.f16, vceq.f16, vcge.f16, vcgt.f16, vcle.f16, vclt.f16
35 .irp op, vceq.f16, vcge.f16, vcgt.f16, vcle.f16, vclt.f16
|
| armv8-2-fp16-simd-warning.l | 31 [^:]*:175: Error: selected processor does not support fp16 instruction -- `vcge.f16 d2,d4,d14'
32 [^:]*:175: Error: selected processor does not support fp16 instruction -- `vcge.f16 q2,q4,q14'
130 [^:]*:224: Error: selected processor does not support fp16 instruction -- `vcge.f16 d14,d2,#0'
131 [^:]*:224: Error: selected processor does not support fp16 instruction -- `vcge.f16 q14,q2,#0'
|
| /external/libavc/common/arm/ |
| ih264_deblk_luma_a9.s | 122 vcge.u8 q9, q11, q10 @Q9 = ( ABS(p0 - q0) >= Alpha )
123 vcge.u8 q12, q12, q8 @Q12=( ABS(q1 - q0) >= Beta )
124 vcge.u8 q13, q13, q8 @Q13=( ABS(p1 - p0) >= Beta )
165 vcge.s8 q12, q12, #0 @Q12 = (i_macro >= 0)
247 vcge.u8 q9, q6, q0 @ABS(p0 - q0) >= Alpha
248 vcge.u8 q7, q7, q1 @ABS(q1 - q0) >= Beta
249 vcge.u8 q8, q8, q1 @ABS(p1 - p0) >= Beta
477 vcge.u8 q15, q15, q14 @ABS(q1 - q0) >= Beta
482 vcge.u8 q13, q13, q14 @ABS(p1 - p0) >= Beta
523 vcge.s8 q14, q14, #0 @sign(delta
[all...] |
| ih264_deblk_chroma_a9.s | 115 vcge.u8 q9, q11, q10 @Q9 = ( ABS(p0 - q0) >= Alpha )
116 vcge.u8 q12, q12, q8 @Q12= ( ABS(q1 - q0) >= Beta )
117 vcge.u8 q13, q13, q8 @Q13= ( ABS(p1 - p0) >= Beta )
295 vcge.u8 q9, q11, q10 @Q9 = ( ABS(p0 - q0) >= Alpha )
301 vcge.u8 q12, q12, q8 @Q12= ( ABS(q1 - q0) >= Beta )
306 vcge.u8 q13, q13, q8 @Q13= ( ABS(p1 - p0) >= Beta )
314 vcge.s8 q4, q4, #0 @Q4 = (i_macro >= 0)
423 vcge.u8 q5, q5, q12 @u4_bS > 0 ?
624 vcge.u8 d5, d22, d12 @u4_bS > 0 ?
728 vcge.u8 q9, q11, q10 @Q9 = ( ABS(p0 - q0) >= Alpha
[all...] |
| /external/libmpeg2/common/arm/ |
| ideint_cac_a9.s | 135 vcge.u16 q10, q8, q9
166 vcge.u8 d1, d0, d9
|
| /external/valgrind/none/tests/arm/ |
| neon128.stdout.exp | [all...] |
| /external/libhevc/common/arm/ |
| ihevc_deblk_luma_horz.s | 512 vcge.u8 d18,d9,d2
519 vcge.u8 d19,d9,d2
541 vcge.u8 d18,d9,d2
545 vcge.u8 d19,d9,d2
|
| ihevc_deblk_luma_vert.s | 520 vcge.u8 d3,d0,d1
531 vcge.u8 d16,d0,d1
575 vcge.u8 d5,d0,d1
587 vcge.u8 d0,d0,d1
|
