/external/llvm/test/MC/ARM/ |
neont2-shift-encoding.s | 5 @ CHECK: vshl.u8 d16, d17, d16 @ encoding: [0x40,0xff,0xa1,0x04] 6 vshl.u8 d16, d17, d16 7 @ CHECK: vshl.u16 d16, d17, d16 @ encoding: [0x50,0xff,0xa1,0x04] 8 vshl.u16 d16, d17, d16 9 @ CHECK: vshl.u32 d16, d17, d16 @ encoding: [0x60,0xff,0xa1,0x04] 10 vshl.u32 d16, d17, d16 11 @ CHECK: vshl.u64 d16, d17, d16 @ encoding: [0x70,0xff,0xa1,0x04] 12 vshl.u64 d16, d17, d16 13 @ CHECK: vshl.i8 d16, d16, #7 @ encoding: [0xcf,0xef,0x30,0x05] 14 vshl.i8 d16, d16, # [all...] |
neon-shift-encoding.s | 4 vshl.u8 d16, d17, d16 5 vshl.u16 d16, d17, d16 6 vshl.u32 d16, d17, d16 7 vshl.u64 d16, d17, d16 8 vshl.i8 d16, d16, #7 9 vshl.i16 d16, d16, #15 10 vshl.i32 d16, d16, #31 11 vshl.i64 d16, d16, #63 12 vshl.u8 q8, q9, q8 13 vshl.u16 q8, q9, q [all...] |
/external/swiftshader/third_party/LLVM/test/MC/ARM/ |
neont2-shift-encoding.s | 5 @ CHECK: vshl.u8 d16, d17, d16 @ encoding: [0x40,0xff,0xa1,0x04] 6 vshl.u8 d16, d17, d16 7 @ CHECK: vshl.u16 d16, d17, d16 @ encoding: [0x50,0xff,0xa1,0x04] 8 vshl.u16 d16, d17, d16 9 @ CHECK: vshl.u32 d16, d17, d16 @ encoding: [0x60,0xff,0xa1,0x04] 10 vshl.u32 d16, d17, d16 11 @ CHECK: vshl.u64 d16, d17, d16 @ encoding: [0x70,0xff,0xa1,0x04] 12 vshl.u64 d16, d17, d16 13 @ CHECK: vshl.i8 d16, d16, #7 @ encoding: [0xcf,0xef,0x30,0x05] 14 vshl.i8 d16, d16, # [all...] |
neon-shift-encoding.s | 4 @ CHECK: vshl.u8 d16, d17, d16 @ encoding: [0xa1,0x04,0x40,0xf3] 5 vshl.u8 d16, d17, d16 6 @ CHECK: vshl.u16 d16, d17, d16 @ encoding: [0xa1,0x04,0x50,0xf3] 7 vshl.u16 d16, d17, d16 8 @ CHECK: vshl.u32 d16, d17, d16 @ encoding: [0xa1,0x04,0x60,0xf3] 9 vshl.u32 d16, d17, d16 10 @ CHECK: vshl.u64 d16, d17, d16 @ encoding: [0xa1,0x04,0x70,0xf3] 11 vshl.u64 d16, d17, d16 12 @ CHECK: vshl.i8 d16, d16, #7 @ encoding: [0x30,0x05,0xcf,0xf2] 13 vshl.i8 d16, d16, # [all...] |
/external/libhevc/common/arm/ |
ihevc_inter_pred_luma_copy_w16out.s | 112 vshl.i64 q0,q0,#6 @vshlq_n_s64(temp, 6) 119 vshl.i64 q11,q11,#6 @vshlq_n_s64(temp, 6) 122 vshl.i64 q12,q12,#6 @vshlq_n_s64(temp, 6) 126 vshl.i64 q13,q13,#6 @vshlq_n_s64(temp, 6) 163 vshl.i16 q0,q8,#6 @vshlq_n_s16(tmp, 6) 164 vshl.i16 q1,q9,#6 @vshlq_n_s16(tmp, 6) 165 vshl.i16 q2,q10,#6 @vshlq_n_s16(tmp, 6) 166 vshl.i16 q3,q11,#6 @vshlq_n_s16(tmp, 6) 204 vshl.i16 q0,q8,#6 @vshlq_n_s16(tmp, 6) 207 vshl.i16 q1,q9,#6 @vshlq_n_s16(tmp, 6 [all...] |
ihevc_inter_pred_chroma_copy_w16out.s | 144 vshl.i64 q0,q0,#6 @vshlq_n_s64(temp, 6) 151 vshl.i64 q11,q11,#6 @vshlq_n_s64(temp, 6) 154 vshl.i64 q12,q12,#6 @vshlq_n_s64(temp, 6) 158 vshl.i64 q13,q13,#6 @vshlq_n_s64(temp, 6) 186 vshl.i64 q0,q0,#6 @vshlq_n_s64(temp, 6) 193 vshl.i64 q11,q11,#6 @vshlq_n_s64(temp, 6) 225 vshl.i16 q0,q8,#6 @vshlq_n_s16(tmp, 6) 226 vshl.i16 q1,q9,#6 @vshlq_n_s16(tmp, 6) 227 vshl.i16 q2,q10,#6 @vshlq_n_s16(tmp, 6) 228 vshl.i16 q3,q11,#6 @vshlq_n_s16(tmp, 6 [all...] |
ihevc_intra_pred_chroma_mode2.s | 259 vshl.i64 d0,d12,#32 261 vshl.i64 d1,d13,#32 265 vshl.i64 d2,d14,#32 268 vshl.i64 d3,d15,#32 274 vshl.i64 d4,d16,#32 276 vshl.i64 d5,d17,#32 284 vshl.i64 d6,d18,#32 287 vshl.i64 d7,d19,#32
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ihevc_intra_pred_luma_planar.s | 215 vshl.s16 q6, q6, q7 @(1)shr 232 vshl.s16 q15, q15, q7 @(2)shr 249 vshl.s16 q14, q14, q7 @(3)shr 266 vshl.s16 q5, q5, q7 @(4)shr 282 vshl.s16 q8, q8, q7 @(5)shr 299 vshl.s16 q9, q9, q7 @(6)shr 315 vshl.s16 q13, q13, q7 @(7)shr 349 vshl.s16 q12, q12, q7 @(8)shr 381 vshl.s16 q6, q6, q7 @(1)shr 401 vshl.s16 q15, q15, q7 @(2)sh [all...] |
ihevc_intra_pred_chroma_planar.s | 207 vshl.s16 q6, q6, q7 @shr 211 vshl.s16 q14,q14,q7 231 vshl.s16 q13, q13, q7 @shr 237 vshl.s16 q12,q12,q7 256 vshl.s16 q11, q11, q7 @shr 271 vshl.s16 q10,q10,q7 282 vshl.s16 q6, q6, q7 @shr 284 vshl.s16 q14,q14,q7 346 @ vshl.s16 q6, q6, q7 @shr
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ihevc_intra_pred_chroma_dc.s | 253 vshl.i64 d3,d30,#32 256 vshl.i64 d2,d31,#32 265 vshl.i64 d3,d26,#32 266 vshl.i64 d2,d27,#32
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ihevc_itrans_recon_4x4.s | 165 vshl.s32 q5,q5,#6 @e[0] = 64*(pi2_src[0] + pi2_src[2]) 166 vshl.s32 q6,q6,#6 @e[1] = 64*(pi2_src[0] - pi2_src[2]) 195 vshl.s32 q5,q5,#6 @e[0] = 64*(pi2_src[0] + pi2_src[2]) 196 vshl.s32 q6,q6,#6 @e[1] = 64*(pi2_src[0] - pi2_src[2])
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ihevc_weighted_pred_uni.s | 175 vshl.s32 q2,q2,q14 @vshlq_s32(i4_tmp1_t, tmp_shift_t) 184 vshl.s32 q3,q3,q14 @vshlq_s32(i4_tmp2_t, tmp_shift_t) ii iteration 189 vshl.s32 q5,q5,q14 @vshlq_s32(i4_tmp1_t, tmp_shift_t) iii iteration 197 vshl.s32 q6,q6,q14 @vshlq_s32(i4_tmp2_t, tmp_shift_t) iv iteration
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ihevc_intra_pred_luma_dc.s | 134 vshl.i64 d8, d8, #32 192 vshl.s64 d9, d6, d8 @(dc_val) shr by log2nt+1 199 vshl.s64 d13, d9, #1 @2*dc 440 vshl.s64 d9, d6, d8 @(dc_val) shr by log2nt+1 443 vshl.s64 d13, d9, #1 @2*dc
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/external/capstone/suite/MC/ARM/ |
neont2-shift-encoding.s.cs | 2 0x40,0xff,0xa1,0x04 = vshl.u8 d16, d17, d16 3 0x50,0xff,0xa1,0x04 = vshl.u16 d16, d17, d16 4 0x60,0xff,0xa1,0x04 = vshl.u32 d16, d17, d16 5 0x70,0xff,0xa1,0x04 = vshl.u64 d16, d17, d16 6 0xcf,0xef,0x30,0x05 = vshl.i8 d16, d16, #7 7 0xdf,0xef,0x30,0x05 = vshl.i16 d16, d16, #15 8 0xff,0xef,0x30,0x05 = vshl.i32 d16, d16, #31 9 0xff,0xef,0xb0,0x05 = vshl.i64 d16, d16, #63 10 0x40,0xff,0xe2,0x04 = vshl.u8 q8, q9, q8 11 0x50,0xff,0xe2,0x04 = vshl.u16 q8, q9, q [all...] |
neon-shift-encoding.s.cs | 2 0xa1,0x04,0x40,0xf3 = vshl.u8 d16, d17, d16 3 0xa1,0x04,0x50,0xf3 = vshl.u16 d16, d17, d16 4 0xa1,0x04,0x60,0xf3 = vshl.u32 d16, d17, d16 5 0xa1,0x04,0x70,0xf3 = vshl.u64 d16, d17, d16 6 0x30,0x05,0xcf,0xf2 = vshl.i8 d16, d16, #7 7 0x30,0x05,0xdf,0xf2 = vshl.i16 d16, d16, #15 8 0x30,0x05,0xff,0xf2 = vshl.i32 d16, d16, #31 9 0xb0,0x05,0xff,0xf2 = vshl.i64 d16, d16, #63 10 0xe2,0x04,0x40,0xf3 = vshl.u8 q8, q9, q8 11 0xe2,0x04,0x50,0xf3 = vshl.u16 q8, q9, q [all...] |
/toolchain/binutils/binutils-2.27/gas/testsuite/gas/arm/ |
neon-addressing-bad.l | 28 [^:]*:34: Error: immediate out of range for shift -- `vshl.i8 d0,d0,#8' 29 [^:]*:36: Error: immediate out of range for shift -- `vshl.i16 d0,d0,#16' 30 [^:]*:38: Error: immediate out of range for shift -- `vshl.i32 d0,d0,#32' 31 [^:]*:40: Error: .* -- `vshl.i64 d0,d0,#64'
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/external/boringssl/src/crypto/curve25519/asm/ |
x25519-asm-arm.S | 123 vshl.i64 q12,q12,#26 126 vshl.i64 q13,q13,#26 133 vshl.i64 q12,q12,#25 138 vshl.i64 q13,q13,#25 141 vshl.i64 q12,q12,#26 148 vshl.i64 q13,q13,#26 151 vshl.i64 q12,q12,#25 161 vshl.i64 q12,q12,#26 166 vshl.i64 q6,q13,#4 171 vshl.i64 q0,q0,#2 [all...] |
/external/libavc/common/arm/ |
ih264_resi_trans_quant_a9.s | 148 vshl.s16 d12, d10, #1 @U_SHIFT(x2,1,shft) 149 vshl.s16 d13, d11, #1 @U_SHIFT(x3,1,shft) 169 vshl.s16 d22, d20, #1 @U_SHIFT(x2,1,shft) 170 vshl.s16 d23, d21, #1 @U_SHIFT(x3,1,shft) 202 vshl.s32 q11, q4, q10 @Shift row 1 203 vshl.s32 q12, q5, q10 @Shift row 2 204 vshl.s32 q13, q6, q10 @Shift row 3 205 vshl.s32 q14, q7, q10 @Shift row 4 343 vshl.s16 d12, d10, #1 @U_SHIFT(x2,1,shft) 344 vshl.s16 d13, d11, #1 @U_SHIFT(x3,1,shft [all...] |
ih264_ihadamard_scaling_a9.s | 146 vshl.s32 q0, q0, q10 @ Q0 = q[i] = (p[i] << (qP/6)) where i = 0..3 147 vshl.s32 q1, q1, q10 @ Q1 = q[i] = (p[i] << (qP/6)) where i = 4..7 148 vshl.s32 q2, q2, q10 @ Q2 = q[i] = (p[i] << (qP/6)) where i = 8..11 149 vshl.s32 q3, q3, q10 @ Q3 = q[i] = (p[i] << (qP/6)) where i = 12..15 239 vshl.s32 q7, q5, q14 240 vshl.s32 q8, q6, q14
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ih264_iquant_itrans_recon_a9.s | 152 vshl.s32 q0, q0, q15 @ Q0 = q[i] = (p[i] << (qP/6)) where i = 0..3 153 vshl.s32 q1, q1, q15 @ Q1 = q[i] = (p[i] << (qP/6)) where i = 4..7 154 vshl.s32 q2, q2, q15 @ Q2 = q[i] = (p[i] << (qP/6)) where i = 8..11 155 vshl.s32 q3, q3, q15 @ Q3 = q[i] = (p[i] << (qP/6)) where i = 12..15 325 vshl.s32 q0, q0, q15 @ Q0 = q[i] = (p[i] << (qP/6)) where i = 0..3 326 vshl.s32 q1, q1, q15 @ Q1 = q[i] = (p[i] << (qP/6)) where i = 4..7 327 vshl.s32 q2, q2, q15 @ Q2 = q[i] = (p[i] << (qP/6)) where i = 8..11 328 vshl.s32 q3, q3, q15 @ Q3 = q[i] = (p[i] << (qP/6)) where i = 12..15 515 vshl.s32 q0, q0, q15 @ Q0 = q[i] = (p[i] << (qP/6)) where i = 0..3 517 vshl.s32 q1, q1, q15 @ Q1 = q[i] = (p[i] << (qP/6)) where i = 4.. [all...] |
/external/arm-neon-tests/ |
ref_vshl_n.c | 40 vshl##Q##_n_##T2##W(VECT_VAR(vector, T1, W, N), \
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Android.mk | 26 vcgt vclt vbsl vshl vdup_lane vrshrn_n vqdmull_lane \
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ref_vshl.c | 34 #define TEST_MSG "VSHL/VSHLQ" 37 /* Basic test: v3=vshl(v1,v2), then store the result. */ 40 vshl##Q##_##T2##W(VECT_VAR(vector, T1, W, N), \
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/system/core/libpixelflinger/ |
col32cb16blend_neon.S | 80 vshl.u16 q9, q10, #5 // shift dst green0 to top 6 bits 84 vshl.u16 q12, q11, #5 // shift dst green1 to top 6 bits
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/external/libmpeg2/common/arm/ |
ideint_cac_a9.s | 96 vshl.u32 q8, q1, #16 123 vshl.u32 q9, q3, #16 172 vshl.u16 d0, d0, #2 192 vshl.u16 d0, d0, #2
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