| /external/libdrm/radeon/ |
| radeon_cs_space.c | 47 uint32_t read_domains, write_domain; local
53 write_domain = sc->write_domain;
57 bo->space_accounted = sc->new_accounted = (read_domains << 16) | write_domain;
62 if (write_domain && (write_domain == bo->space_accounted)) {
72 if (write_domain) {
73 if (write_domain == RADEON_GEM_DOMAIN_VRAM)
75 else if (write_domain == RADEON_GEM_DOMAIN_GTT)
77 sc->new_accounted = write_domain;
[all...] |
| radeon_bo_gem.h | 42 int radeon_gem_set_domain(struct radeon_bo *bo, uint32_t read_domains, uint32_t write_domain);
|
| radeon_cs.h | 44 uint32_t write_domain; member in struct:radeon_cs_reloc
86 uint32_t write_domain,
99 uint32_t write_domain);
113 uint32_t write_domain);
|
| radeon_cs_int.h | 8 uint32_t write_domain; member in struct:radeon_cs_space_check
41 uint32_t write_domain,
|
| radeon_cs_gem.c | 68 uint32_t write_domain; member in struct:cs_reloc_gem
178 uint32_t write_domain,
190 if ((read_domain && write_domain) || (!read_domain && !write_domain)) {
199 if (write_domain == RADEON_GEM_DOMAIN_CPU) {
220 if (write_domain && (reloc->read_domain & write_domain)) {
222 reloc->write_domain = write_domain;
223 } else if (read_domain & reloc->write_domain) {
[all...] |
| radeon_cs.c | 18 uint32_t read_domain, uint32_t write_domain,
26 write_domain,
|
| radeon_bo_gem.c | 347 radeon_gem_set_domain(struct radeon_bo *bo, uint32_t read_domains, uint32_t write_domain)
355 args.write_domain = write_domain;
|
| /external/mesa3d/src/mesa/drivers/dri/i915/ |
| intel_batchbuffer.h | 48 uint32_t write_domain,
53 uint32_t write_domain,
143 #define OUT_RELOC(buf, read_domains, write_domain, delta) do { \
145 read_domains, write_domain, delta); \
147 #define OUT_RELOC_FENCED(buf, read_domains, write_domain, delta) do { \
149 read_domains, write_domain, delta); \
|
| intel_batchbuffer.c | 197 uint32_t read_domains, uint32_t write_domain,
204 read_domains, write_domain);
222 uint32_t write_domain,
229 read_domains, write_domain);
|
| /external/mesa3d/src/mesa/drivers/dri/i965/ |
| intel_batchbuffer.h | 70 uint32_t write_domain,
76 uint32_t write_domain,
163 #define OUT_RELOC(buf, read_domains, write_domain, delta) do { \
167 (write_domain), \
172 #define OUT_RELOC64(buf, read_domains, write_domain, delta) do { \
176 (write_domain), \
|
| intel_batchbuffer.c | 444 uint32_t read_domains, uint32_t write_domain,
451 read_domains, write_domain);
465 uint32_t read_domains, uint32_t write_domain,
470 read_domains, write_domain);
496 uint32_t read_domains, uint32_t write_domain,
510 OUT_RELOC64(bo, read_domains, write_domain, offset + i * 4);
518 OUT_RELOC(bo, read_domains, write_domain, offset + i * 4);
528 uint32_t read_domains, uint32_t write_domain,
531 load_sized_register_mem(brw, reg, bo, read_domains, write_domain, offset, 1);
538 uint32_t read_domains, uint32_t write_domain,
[all...] |
| genX_blorp_exec.c | 61 address.write_domain,
66 address.write_domain,
81 address.read_domains, address.write_domain);
152 .write_domain = 0,
|
| /external/mesa3d/src/gallium/winsys/i915/drm/ |
| i915_drm_batchbuffer.c | 101 unsigned write_domain = 0; local
108 write_domain = 0;
112 write_domain = I915_GEM_DOMAIN_RENDER;
116 write_domain = I915_GEM_DOMAIN_RENDER;
120 write_domain = 0;
124 write_domain = 0;
138 write_domain);
143 write_domain);
|
| /external/libdrm/intel/ |
| intel_bufmgr_priv.h | 190 uint32_t read_domains, uint32_t write_domain);
195 uint32_t write_domain);
|
| intel_bufmgr.c | 205 uint32_t read_domains, uint32_t write_domain)
209 read_domains, write_domain);
216 uint32_t read_domains, uint32_t write_domain)
220 read_domains, write_domain);
|
| intel_bufmgr_fake.c | 89 uint32_t write_domain; member in struct:fake_buffer_reloc
206 uint32_t write_domain; member in struct:_drm_intel_bo_fake
[all...] |
| intel_bufmgr.h | 153 uint32_t read_domains, uint32_t write_domain);
157 uint32_t read_domains, uint32_t write_domain);
|
| /external/mesa3d/src/gallium/winsys/intel/drm/ |
| intel_drm_winsys.c | 594 uint32_t read_domains, write_domain; local
603 write_domain = (flags & INTEL_RELOC_GGTT) ?
605 read_domains = write_domain;
607 write_domain = 0;
617 read_domains, write_domain);
621 read_domains, write_domain);
|
| /external/mesa3d/src/gallium/winsys/radeon/drm/ |
| radeon_drm_cs.h | 125 return cs->csc->relocs[index].write_domain != 0;
|
| radeon_drm_cs.c | 46 cs_add_buffer(cs, buf, read_domain, write_domain) adds a new relocation and
61 cs_add_buffer. The read_domain and write_domain parameters have been removed,
284 reloc->write_domain = 0;
366 added_domains = (rd | wd) & ~(reloc->read_domains | reloc->write_domain);
368 reloc->write_domain |= wd;
736 if ((usage & RADEON_USAGE_WRITE) && cs->csc->relocs[index].write_domain)
|
| /external/mesa3d/src/intel/vulkan/ |
| anv_gem_stubs.c | 112 uint32_t read_domains, uint32_t write_domain)
|
| anv_gem.c | 138 uint32_t read_domains, uint32_t write_domain)
143 .write_domain = write_domain,
|
| /external/mesa3d/src/intel/blorp/ |
| blorp.h | 94 uint32_t write_domain; member in struct:blorp_address
|
| /external/drm_gralloc/ |
| gralloc_drm_intel.c | 103 uint32_t read_domains, uint32_t write_domain)
110 target->ibo, 0, read_domains, write_domain);
|
| /prebuilts/gcc/linux-x86/host/x86_64-linux-glibc2.15-4.8/sysroot/usr/include/drm/ |
| i915_drm.h | 455 __u32 write_domain; member in struct:drm_i915_gem_set_domain
505 __u32 write_domain; member in struct:drm_i915_gem_relocation_entry
|
