| /external/llvm/test/CodeGen/Mips/compactbranches/ |
| compact-branch-policy.ll | 12 ; ALWAYS: beqzc
14 ; immediately following beqzc would cause a forbidden slot hazard.
|
| no-beqzc-bnezc.ll | 5 ; bnezc and beqzc have restriction that $rt != 0
23 ; CHECK-NOT: beqzc $0
|
| beqc-bnec-register-constraint.ll | 4 ; Cases where $rs == 0 and $rt != 0 should be transformed into beqzc/bnezc.
|
| compact-branches.ll | 169 ; CHECK: beqzc
194 ; CHECK: beqzc
|
| /external/llvm/test/CodeGen/Mips/ |
| atomic.ll | 46 ; MICROMIPS: beqzc $[[R4]], $[[BB0]]
47 ; MIPSR6: beqzc $[[R4]], $[[BB0]]
68 ; MICROMIPS: beqzc $[[R2]], $[[BB0]]
69 ; MIPSR6: beqzc $[[R2]], $[[BB0]]
89 ; MICROMIPS: beqzc $[[R2]], $[[BB0]]
90 ; MIPSR6: beqzc $[[R2]], $[[BB0]]
114 ; MICROMIPS: beqzc $[[R2]], $[[BB0]]
115 ; MIPSR6: beqzc $[[R2]], $[[BB0]]
156 ; MICROMIPS: beqzc $[[R16]], $[[BB0]]
157 ; MIPSR6: beqzc $[[R16]], $[[BB0]
[all...] |
| analyzebranch.ll | 53 ; 64-GPR beqzc $[[GPRCC]], $BB
|
| fpbr.ll | 86 ; 64-GPR: beqzc $[[GPRCC]], $BB2_2
177 ; 64-GPR: beqzc $[[GPRCC]], $BB5_2
|
| /external/v8/src/ic/mips/ |
| ic-mips.cc | 110 opcode == POP66 || // BEQZC
120 opcode = POP76; // change BEQZC to BNEZC.
129 opcode = POP66; // change BNEZC to BEQZC.
|
| /external/v8/src/ic/mips64/ |
| ic-mips64.cc | 110 opcode == POP66 || // BEQZC
120 opcode = POP76; // change BEQZC to BNEZC.
129 opcode = POP66; // change BNEZC to BEQZC.
|
| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/mips/ |
| pcrel-reloc-4-r6.d | 25 [0-9a-f]+ <[^>]*> d85fffff beqzc v0,00000020 <foo\+0x20>
27 [0-9a-f]+ <[^>]*> d85fffff beqzc v0,00000024 <foo\+0x24>
29 [0-9a-f]+ <[^>]*> d85fffff beqzc v0,00000028 <foo\+0x28>
31 [0-9a-f]+ <[^>]*> d85fffff beqzc v0,0000002c <foo\+0x2c>
|
| pcrel-reloc-5-r6.d | 31 [0-9a-f]+ <[^>]*> d85fffff beqzc v0,00010050 <foo\+0x20>
33 [0-9a-f]+ <[^>]*> d85fffff beqzc v0,00010054 <foo\+0x24>
35 [0-9a-f]+ <[^>]*> d85fffff beqzc v0,00010058 <foo\+0x28>
37 [0-9a-f]+ <[^>]*> d85fffff beqzc v0,0001005c <foo\+0x2c>
|
| branch-local-1.d | 15 [0-9a-f]+ <[^>]*> 40e2 fffe beqzc v0,00001014 <bar\+0x4>
|
| branch-local-n32-1.d | 15 [0-9a-f]+ <[^>]*> 40e2 0000 beqzc v0,00001018 <bar\+0x8>
|
| branch-local-n64-1.d | 15 [0-9a-f]+ <[^>]*> 40e2 0000 beqzc v0,0000000000001018 <bar\+0x8>
|
| r6-branch-constraints.l | 6 .*:6: Error: invalid operands `beqzc \$0,.'
|
| r6.s | 227 beqzc $2, ext
228 beqzc $2, . + 4 + (-1048576 << 2)
229 beqzc $2, . + 4 + (1048575 << 2)
230 beqzc $2, 1f
|
| micromips-branch-relax.s | 83 beqzc $3, test3
|
| /toolchain/binutils/binutils-2.27/ld/testsuite/ld-mips-elf/ |
| undefweak-overflow.d | 7 [ 0-9a-f]+: d85fffff beqzc v0,20000000 <_ftext>
|
| /art/runtime/interpreter/mterp/mips64/ |
| footer.S | 44 beqzc a0, MterpFallback # If not, fall back to reference interpreter.
57 beqzc v0, MterpExceptionReturn # no local catch, back to caller.
104 beqzc rPROFILE, .L_add_batch # counted down to zero - report
|
| /external/llvm/test/MC/Mips/micromips32r6/ |
| relocations.s | 20 # CHECK-FIXUP: beqzc $3, bar # encoding: [0x80,0b011AAAAA,A,A]
42 beqzc $3, bar
|
| /external/llvm/test/MC/Mips/micromips64r6/ |
| relocations.s | 23 # CHECK-FIXUP: beqzc $3, bar # encoding: [0x80,0b011AAAAA,A,A]
47 beqzc $3, bar
|
| /external/llvm/test/MC/Mips/mips32r6/ |
| relocations.s | 17 # CHECK-FIXUP: beqzc $9, bar # encoding: [0xd9,0b001AAAAA,A,A]
63 beqzc $9, bar
|
| /external/llvm/test/MC/Mips/mips64r6/ |
| relocations.s | 17 # CHECK-FIXUP: beqzc $9, bar # encoding: [0xd9,0b001AAAAA,A,A]
68 beqzc $9, bar
|
| /art/compiler/optimizing/ |
| intrinsics_mips64.cc | 857 __ Beqzc(TMP, &done);
915 __ Beqzc(TMP, &done);
[all...] |
| /art/runtime/arch/mips64/ |
| quick_entrypoints_mips64.S | [all...] |
