/external/llvm/lib/Target/BPF/MCTargetDesc/ |
BPFAsmBackend.cpp | 34 void applyFixup(const MCFixup &Fixup, char *Data, unsigned DataSize, 40 bool fixupNeedsRelaxation(const MCFixup &Fixup, uint64_t Value, 66 void BPFAsmBackend::applyFixup(const MCFixup &Fixup, char *Data, 70 if (Fixup.getKind() == FK_SecRel_4 || Fixup.getKind() == FK_SecRel_8) { 72 } else if (Fixup.getKind() == FK_Data_4 || Fixup.getKind() == FK_Data_8) { 73 unsigned Size = Fixup.getKind() == FK_Data_4 ? 4 : 8; 77 Data[Fixup.getOffset() + Idx] = uint8_t(Value >> (i * 8)); 80 assert(Fixup.getKind() == FK_PCRel_2) [all...] |
/external/llvm/lib/Target/Mips/MCTargetDesc/ |
MipsFixupKinds.h | 1 //===-- MipsFixupKinds.h - Mips Specific Fixup Entries ----------*- C++ -*-===// 17 // Although most of the current fixup types reflect a unique relocation 18 // one can have multiple fixup types for a given relocation and thus need 32 // Pure 32 bit data fixup resulting in - R_MIPS_32. 35 // Full 32 bit data relative data fixup resulting in - R_MIPS_REL32. 38 // Jump 26 bit fixup resulting in - R_MIPS_26. 41 // Pure upper 16 bit fixup resulting in - R_MIPS_HI16. 44 // Pure lower 16 bit fixup resulting in - R_MIPS_LO16. 47 // 16 bit fixup for GP offest resulting in - R_MIPS_GPREL16. 50 // 16 bit literal fixup resulting in - R_MIPS_LITERAL [all...] |
/device/linaro/bootloader/edk2/EdkCompatibilityPkg/Foundation/Library/Pei/PeiLib/Ipf/ |
PeCoffLoaderEx.c | 78 IN OUT CHAR8 *Fixup,
86 Performs an Itanium-based specific relocation fixup
92 Fixup - Pointer to the address to fix up
96 Adjust - The offset to adjust the fixup
116 Fixup = (CHAR8 *)((UINTN) Fixup & (UINTN) ~(15));
123 (UINT32 *)Fixup + IMM64_IMM7B_INST_WORD_X,
130 (UINT32 *)Fixup + IMM64_IMM9D_INST_WORD_X,
137 (UINT32 *)Fixup + IMM64_IMM5C_INST_WORD_X,
144 (UINT32 *)Fixup + IMM64_IC_INST_WORD_X, [all...] |
/external/llvm/test/MC/AMDGPU/ |
labels-branch.s | 6 // VI-NEXT: ; fixup A - offset: 0, value: loop_start, kind: fixup_si_sopp_br 10 // VI-NEXT: ; fixup A - offset: 0, value: loop_end, kind: fixup_si_sopp_br 15 // VI-NEXT: ; fixup A - offset: 0, value: gds, kind: fixup_si_sopp_br
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/external/llvm/test/MC/ARM/ |
arm_fixups.s | 8 @ CHECK: @ fixup A - offset: 0, value: _printf, kind: fixup_arm_uncondbl 10 @ CHECK-BE: @ fixup A - offset: 0, value: _printf, kind: fixup_arm_uncondbl 17 @ CHECK: @ fixup A - offset: 0, value: _foo, kind: fixup_arm_movw_lo16 19 @ CHECK-BE: @ fixup A - offset: 0, value: _foo, kind: fixup_arm_movw_lo16 21 @ CHECK: @ fixup A - offset: 0, value: _foo, kind: fixup_arm_movw_lo16 23 @ CHECK-BE: @ fixup A - offset: 0, value: _foo, kind: fixup_arm_movw_lo16 25 @ CHECK: @ fixup A - offset: 0, value: _foo, kind: fixup_arm_movt_hi16 27 @ CHECK-BE: @ fixup A - offset: 0, value: _foo, kind: fixup_arm_movt_hi16 32 @ CHECK: @ fixup A - offset: 0, value: fred, kind: fixup_arm_movw_lo16 34 @ CHECK-BE: @ fixup A - offset: 0, value: fred, kind: fixup_arm_movw_lo1 [all...] |
/device/linaro/bootloader/edk2/EdkCompatibilityPkg/Foundation/Library/EdkIIGlueLib/Library/BasePeCoffLib/Ebc/ |
PeCoffLoaderEx.c | 26 Performs an EBC specific relocation fixup.
29 @param Fixup Pointer to the address to fix up.
31 @param Adjust The offset to adjust the fixup.
39 IN OUT CHAR8 *Fixup,
77 Performs an Itanium-based specific re-relocation fixup and is a no-op on other
82 @param Fixup Pointer to the address to fix up.
84 @param Adjust The offset to adjust the fixup.
92 IN OUT CHAR8 *Fixup,
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/device/linaro/bootloader/edk2/EdkCompatibilityPkg/Foundation/Library/EdkIIGlueLib/Library/BasePeCoffLib/Ia32/ |
PeCoffLoaderEx.c | 26 Performs an IA-32 specific relocation fixup.
29 @param Fixup Pointer to the address to fix up.
31 @param Adjust The offset to adjust the fixup.
39 IN OUT CHAR8 *Fixup,
76 Performs an Itanium-based specific re-relocation fixup and is a no-op on other
81 @param Fixup Pointer to the address to fix up.
83 @param Adjust The offset to adjust the fixup.
91 IN OUT CHAR8 *Fixup,
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/device/linaro/bootloader/edk2/EdkCompatibilityPkg/Foundation/Library/EdkIIGlueLib/Library/BasePeCoffLib/X64/ |
PeCoffLoaderEx.c | 27 Performs an x64 specific relocation fixup.
30 @param Fixup Pointer to the address to fix up
32 @param Adjust The offset to adjust the fixup
40 IN OUT CHAR8 *Fixup,
78 Performs an X64 specific re-relocation fixup and is a no-op on other
83 @param Fixup Pointer to the address to fix up.
85 @param Adjust The offset to adjust the fixup.
93 IN OUT CHAR8 *Fixup,
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/device/linaro/bootloader/edk2/MdePkg/Library/BasePeCoffLib/ |
PeCoffLoaderEx.c | 19 Performs an Itanium-based specific relocation fixup and is a no-op on other
23 @param Fixup The pointer to the address to fix up.
25 @param Adjust The offset to adjust the fixup.
33 IN OUT CHAR8 *Fixup,
68 Performs an Itanium-based specific re-relocation fixup and is a no-op on other
73 @param Fixup The pointer to the address to fix up.
75 @param Adjust The offset to adjust the fixup.
83 IN OUT CHAR8 *Fixup,
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/external/llvm/test/MC/AArch64/ |
arm64-arm64-fixup.s | 6 ; CHECK: fixup A - offset: 0, value: Lbar, kind: fixup_aarch64_pcrel_adr_imm21 10 ; CHECK: fixup A - offset: 0, value: _printf@PAGE, kind: fixup_aarch64_pcrel_adrp_imm21
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tls-relocs.s | 12 // CHECK: // fixup A - offset: 0, value: :dtprel_g2:var, kind: fixup_aarch64_movw 14 // CHECK: // fixup A - offset: 0, value: :dtprel_g2:var, kind: fixup_aarch64_movw 16 // CHECK: // fixup A - offset: 0, value: :dtprel_g2:var, kind: fixup_aarch64_movw 18 // CHECK: // fixup A - offset: 0, value: :dtprel_g2:var, kind: fixup_aarch64_movw 34 // CHECK: // fixup A - offset: 0, value: :dtprel_g1:var, kind: fixup_aarch64_movw 36 // CHECK: // fixup A - offset: 0, value: :dtprel_g1:var, kind: fixup_aarch64_movw 38 // CHECK: // fixup A - offset: 0, value: :dtprel_g1:var, kind: fixup_aarch64_movw 40 // CHECK: // fixup A - offset: 0, value: :dtprel_g1:var, kind: fixup_aarch64_movw 52 // CHECK: // fixup A - offset: 0, value: :dtprel_g1_nc:var, kind: fixup_aarch64_movw 54 // CHECK: // fixup A - offset: 0, value: :dtprel_g1_nc:var, kind: fixup_aarch64_mov [all...] |
arm64-large-relocs.s | 7 // CHECK-NEXT: // fixup A - offset: 0, value: :abs_g0:sym, kind: fixup_aarch64_movw 9 // CHECK-NEXT: // fixup A - offset: 0, value: :abs_g0_nc:sym, kind: fixup_aarch64_movw 17 // CHECK-NEXT: // fixup A - offset: 0, value: :abs_g1:sym, kind: fixup_aarch64_movw 19 // CHECK-NEXT: // fixup A - offset: 0, value: :abs_g1_nc:sym, kind: fixup_aarch64_movw 27 // CHECK-NEXT: // fixup A - offset: 0, value: :abs_g2:sym, kind: fixup_aarch64_movw 29 // CHECK-NEXT: // fixup A - offset: 0, value: :abs_g2_nc:sym, kind: fixup_aarch64_movw 36 // CHECK-NEXT: // fixup A - offset: 0, value: :abs_g3:sym, kind: fixup_aarch64_movw
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/external/llvm/test/MC/Lanai/ |
ctrl-instructions.s | 4 ! CHECK-NEXT: ! fixup A - offset: 0, value: .Ltmp0, kind: FIXUP_LANAI_25 10 ! CHECK-NEXT: ! fixup A - offset: 0, value: foo, kind: FIXUP_LANAI_25
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/external/llvm/test/MC/Mips/ |
mips-diagnostic-fixup.s | 4 # CHECK: error: out of range PC16 fixup 5 # CHECK: error: out of range PC16 fixup
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relocation-n64.s | 2 // RUN: | FileCheck -check-prefixes=ENCBE,FIXUP %s 4 // RUN: | FileCheck -check-prefixes=ENCLE,FIXUP %s 16 // FIXUP - Check the fixup on the instruction. 30 // FIXUP: # fixup A - offset: 0, value: %lo(%neg(%gp_rel(foo))), kind: fixup_Mips_GPOFF_LO 35 // FIXUP: # fixup A - offset: 0, value: %lo(%neg(%gp_rel(bar))), kind: fixup_Mips_GPOFF_LO
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macro-bcc-imm.s | 9 # ALL: # fixup A - offset: 0, value: foo-4, kind: fixup_Mips_PC16 13 # ALL: # fixup A - offset: 0, value: foo-4, kind: fixup_Mips_PC16 17 # ALL: # fixup A - offset: 0, value: foo-4, kind: fixup_Mips_PC16 21 # ALL: # fixup A - offset: 0, value: foo-4, kind: fixup_Mips_PC16 25 # ALL: # fixup A - offset: 0, value: foo-4, kind: fixup_Mips_PC16 29 # ALL: # fixup A - offset: 0, value: foo-4, kind: fixup_Mips_PC16 33 # ALL: # fixup A - offset: 0, value: foo-4, kind: fixup_Mips_PC16 37 # ALL: # fixup A - offset: 0, value: foo-4, kind: fixup_Mips_PC16 41 # ALL: # fixup A - offset: 0, value: foo-4, kind: fixup_Mips_PC16 45 # ALL: # fixup A - offset: 0, value: foo-4, kind: fixup_Mips_PC1 [all...] |
macro-la-pic.s | 10 # CHECK: # fixup A - offset: 0, value: %got(symbol), kind: fixup_Mips_GOT 12 # CHECK: # fixup A - offset: 0, value: %got(symbol), kind: fixup_Mips_GOT 15 # CHECK: # fixup A - offset: 0, value: %got(symbol), kind: fixup_Mips_GOT 18 # CHECK: # fixup A - offset: 0, value: %got(symbol+8), kind: fixup_Mips_GOT 20 # CHECK: # fixup A - offset: 0, value: %got(symbol+8), kind: fixup_Mips_GOT 23 # CHECK: # fixup A - offset: 0, value: %got(symbol+8), kind: fixup_Mips_GOT 27 # CHECK: # fixup A - offset: 0, value: %got($tmp0), kind: fixup_Mips_GOT 29 # CHECK: # fixup A - offset: 0, value: %lo($tmp0), kind: fixup_Mips_LO16 34 # CHECK: # fixup A - offset: 0, value: %call16(symbol), kind: fixup_Mips_CALL16 36 # CHECK: # fixup A - offset: 0, value: %got(symbol), kind: fixup_Mips_GO [all...] |
/external/llvm/lib/Target/ARM/MCTargetDesc/ |
ARMFixupKinds.h | 1 //===-- ARMFixupKinds.h - ARM Specific Fixup Entries ------------*- C++ -*-===// 66 // fixup_arm_thumb_br - 12-bit fixup for Thumb B instructions. 78 // fixup_arm_uncondbl - Fixup for unconditional ARM BL instructions. 81 // fixup_arm_condbl - Fixup for ARM BL instructions with nontrivial 85 // fixup_arm_blx - Fixup for ARM BLX instructions. 88 // fixup_arm_thumb_bl - Fixup for Thumb BL instructions. 91 // fixup_arm_thumb_blx - Fixup for Thumb BLX instructions. 94 // fixup_arm_thumb_cb - Fixup for Thumb branch instructions. 97 // fixup_arm_thumb_cp - Fixup for Thumb load/store from constant pool instrs. 100 // fixup_arm_thumb_bcc - Fixup for Thumb conditional branching instructions [all...] |
/external/llvm/test/MC/Sparc/ |
sparc64-ctrl-instructions.s | 5 ! CHECK-NEXT: ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19 9 ! CHECK-NEXT: ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19 13 ! CHECK-NEXT: ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19 17 ! CHECK-NEXT: ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19 21 ! CHECK-NEXT: ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19 25 ! CHECK-NEXT: ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19 29 ! CHECK-NEXT: ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19 33 ! CHECK-NEXT: ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19 37 ! CHECK-NEXT: ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19 41 ! CHECK-NEXT: ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br1 [all...] |
/external/libxml2/test/c14n/1-1-without-comments/ |
xmlbase-c14n11spec3-102.xpath | 4 Check that correct xml:base fixup is performed.
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/external/swiftshader/third_party/LLVM/lib/Target/PowerPC/MCTargetDesc/ |
PPCFixupKinds.h | 1 //===-- PPCFixupKinds.h - PPC Specific Fixup Entries ------------*- C++ -*-===// 26 /// fixup_ppc_lo16 - A 16-bit fixup corresponding to lo16(_foo) for instrs 30 /// fixup_ppc_ha16 - A 16-bit fixup corresponding to ha16(_foo) for instrs 34 /// fixup_ppc_lo14 - A 14-bit fixup corresponding to lo16(_foo) for instrs
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/external/swiftshader/third_party/LLVM/test/MC/ARM/ |
arm_fixups.s | 6 @ CHECK: @ fixup A - offset: 0, value: _printf, kind: fixup_arm_uncondbranch 13 @ CHECK: @ fixup A - offset: 0, value: _foo, kind: fixup_arm_movw_lo16 15 @ CHECK: @ fixup A - offset: 0, value: _foo, kind: fixup_arm_movw_lo16 17 @ CHECK: @ fixup A - offset: 0, value: _foo, kind: fixup_arm_movt_hi16
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/toolchain/binutils/binutils-2.27/ld/emulparams/ |
elf32lppclinux.sh | 5 test -z "${RELOCATING}" || OTHER_SECTIONS="/DISCARD/ : { *(.fixup) }"
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elf32ppclinux.sh | 5 test -z "${RELOCATING}" || OTHER_SECTIONS="/DISCARD/ : { *(.fixup) }"
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/external/llvm/lib/Target/AArch64/MCTargetDesc/ |
AArch64AsmBackend.cpp | 74 void applyFixup(const MCFixup &Fixup, char *Data, unsigned DataSize, 78 bool fixupNeedsRelaxation(const MCFixup &Fixup, uint64_t Value, 94 /// \brief The number of bytes the fixup may change. 98 llvm_unreachable("Unknown fixup kind!"); 139 static uint64_t adjustFixupValue(const MCFixup &Fixup, uint64_t Value, 141 unsigned Kind = Fixup.getKind(); 145 llvm_unreachable("Unknown fixup kind!"); 148 Ctx->reportError(Fixup.getLoc(), "fixup value out of range"); 156 if (Ctx) Ctx->reportError(Fixup.getLoc(), "fixup value out of range") [all...] |