| /external/llvm/test/CodeGen/AArch64/ |
| arm64-indexed-memory.ll | 365 ; CHECK: ldrsb w[[REG:[0-9]+]], [x0, #1]!
376 ; CHECK: ldrsb x[[REG:[0-9]+]], [x0, #1]!
|
| arm64-fast-isel-conversion.ll | 108 ; CHECK: ldrsb w0, [sp, #15]
|
| /system/core/libpixelflinger/codeflinger/ |
| MIPSAssembler.h | 80 // LDRH/LDRSB/LDRSH/STRH
125 virtual void LDRSB(int cc, int Rd,
|
| Arm64Assembler.h | 142 virtual void LDRSB(int cc, int Rd,
|
| MIPSAssembler.cpp | 295 // LDRH/LDRSB/LDRSH/STRH (immediate and Rm can be negative, which indicate U=0)
303 "LDRH/LDRSB/LDRSH/STRH immediate too big (%08x)",
313 "LDRH/LDRSB/LDRSH/STRH immediate too big (%08x)",
917 void ArmToMipsAssembler::LDRSB(int cc __unused, int Rd __unused,
[all...] |
| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/arm/ |
| thumb32.d | [all...] |
| thumb-eabi.d | 64 0+06c <[^>]+> 57f1 ldrsb r1, \[r6, r7\]
|
| thumb.d | 65 0+06c <[^>]+> 57f1 ldrsb r1, \[r6, r7\]
|
| /external/swiftshader/third_party/LLVM/test/MC/Disassembler/ARM/ |
| thumb2.txt | 693 # LDRSB(immediate)
695 # CHECK: ldrsb r5, [r5, #-4]
696 # CHECK: ldrsb.w r5, [r6, #32]
697 # CHECK: ldrsb.w r5, [r6, #33]
698 # CHECK: ldrsb.w r5, [r6, #257]
699 # CHECK: ldrsb.w lr, [r7, #257]
709 # LDRSB(register)
711 # CHECK: ldrsb.w r1, [r8, r1]
712 # CHECK: ldrsb.w r4, [r5, r2]
713 # CHECK: ldrsb.w r6, [r0, r2, lsl #3
[all...] |
| /external/llvm/test/MC/AArch64/ |
| basic-a64-diagnostics.s | [all...] |
| /external/llvm/test/MC/Disassembler/AArch64/ |
| basic-a64-instructions.txt | [all...] |
| /external/valgrind/none/tests/arm64/ |
| memory.stdout.exp | 35 ldrsb x21, [x22, #88] :: rd ffffffffffffffc8 rn (hidden), cin 0, nzcv 00000000
36 ldrsb w21, [x22, #56] :: rd 00000000ffffffa8 rn (hidden), cin 0, nzcv 00000000
41 ldrsb x21, [x22, #-88]! :: rd ffffffffffffff98 rn (hidden), cin 0, nzcv 00000000
42 ldrsb w21, [x22, #-56]! :: rd 00000000ffffffb8 rn (hidden), cin 0, nzcv 00000000
46 ldrsb x21, [x22], #-88 :: rd fffffffffffffff0 rn (hidden), cin 0, nzcv 00000000
47 ldrsb w21, [x22], #-56 :: rd 00000000fffffff0 rn (hidden), cin 0, nzcv 00000000
52 ldrsb x21, [x22, #-88] :: rd ffffffffffffff98 rn (hidden), cin 0, nzcv 00000000
53 ldrsb w21, [x22, #-56] :: rd 00000000ffffffb8 rn (hidden), cin 0, nzcv 00000000
75 ldrsb x21, [x22,x23] :: rd fffffffffffffff5 rm (hidden), rn (hidden), cin 0, nzcv 00000000
76 ldrsb x21, [x22,x23, lsl #0] :: rd fffffffffffffff5 rm (hidden), rn (hidden), cin 0, nzcv 00000000
[all...] |
| /art/compiler/utils/arm/ |
| assembler_arm_vixl.cc | 335 ___ Ldrsb(dest, MemOperand(base, offset));
|
| /external/vixl/src/aarch32/ |
| constants-aarch32.cc | 172 return "ldrsb";
|
| assembler-aarch32.cc | 6187 void Assembler::ldrsb(Condition cond, function in class:vixl::aarch32::Assembler
6353 void Assembler::ldrsb(Condition cond, Register rt, Location* location) { function in class:vixl::aarch32::Assembler
[all...] |
| assembler-aarch32.h | 2473 void ldrsb(Register rt, const MemOperand& operand) { function in class:vixl::aarch32::Assembler
2476 void ldrsb(Condition cond, Register rt, const MemOperand& operand) { function in class:vixl::aarch32::Assembler
2479 void ldrsb(EncodingSize size, Register rt, const MemOperand& operand) { function in class:vixl::aarch32::Assembler
2488 void ldrsb(Register rt, Location* location) { ldrsb(al, rt, location); } function in class:vixl::aarch32::Assembler
[all...] |
| disasm-aarch32.cc | 1798 void Disassembler::ldrsb(Condition cond, function in class:vixl::aarch32::Disassembler
1807 void Disassembler::ldrsb(Condition cond, Register rt, Location* location) { function in class:vixl::aarch32::Disassembler
[all...] |
| /prebuilts/vndk/v27/arm/arch-arm-armv7-a-neon/shared/vndk-core/ |
| libvixl-arm.so | |
| /prebuilts/vndk/v27/arm64/arch-arm-armv7-a-neon/shared/vndk-core/ |
| libvixl-arm.so | |
| /prebuilts/go/darwin-x86/src/cmd/vendor/golang.org/x/arch/arm/armasm/ |
| tables.go | 690 LDRSB
[all...] |
| /prebuilts/go/darwin-x86/src/cmd/vendor/golang.org/x/arch/arm64/arm64asm/ |
| inst.json | 167 {"Name":"LDRSB (immediate)","Bits":"0|0|1|1|1|0|0|0|11:2|0|imm9:9|0|1|Rn:5|Rt:5","Arch":"Post-index 32-bit variant","Syntax":"LDRSB <Wt>, [<Xn|SP>], #<simm>","Code":"","Alias":""},
168 {"Name":"LDRSB (immediate)","Bits":"0|0|1|1|1|0|0|0|10:2|0|imm9:9|0|1|Rn:5|Rt:5","Arch":"Post-index 64-bit variant","Syntax":"LDRSB <Xt>, [<Xn|SP>], #<simm>","Code":"","Alias":""},
169 {"Name":"LDRSB (immediate)","Bits":"0|0|1|1|1|0|0|0|11:2|0|imm9:9|1|1|Rn:5|Rt:5","Arch":"Pre-index 32-bit variant","Syntax":"LDRSB <Wt>, [<Xn|SP>, #<simm>]!","Code":"","Alias":""},
170 {"Name":"LDRSB (immediate)","Bits":"0|0|1|1|1|0|0|0|10:2|0|imm9:9|1|1|Rn:5|Rt:5","Arch":"Pre-index 64-bit variant","Syntax":"LDRSB <Xt>, [<Xn|SP>, #<simm>]!","Code":"","Alias":""},
171 {"Name":"LDRSB (immediate)","Bits":"0|0|1|1|1|0|0|1|11:2|imm12:12|Rn:5|Rt:5","Arch":"Unsigned offset 32-bit variant","Syntax":"LDRSB <Wt>, [<Xn|SP>{, #<pimm>}]","Code":"","Alias":""}
[all...] |
| /prebuilts/go/linux-x86/src/cmd/vendor/golang.org/x/arch/arm/armasm/ |
| tables.go | 690 LDRSB
[all...] |
| /prebuilts/go/linux-x86/src/cmd/vendor/golang.org/x/arch/arm64/arm64asm/ |
| inst.json | 167 {"Name":"LDRSB (immediate)","Bits":"0|0|1|1|1|0|0|0|11:2|0|imm9:9|0|1|Rn:5|Rt:5","Arch":"Post-index 32-bit variant","Syntax":"LDRSB <Wt>, [<Xn|SP>], #<simm>","Code":"","Alias":""},
168 {"Name":"LDRSB (immediate)","Bits":"0|0|1|1|1|0|0|0|10:2|0|imm9:9|0|1|Rn:5|Rt:5","Arch":"Post-index 64-bit variant","Syntax":"LDRSB <Xt>, [<Xn|SP>], #<simm>","Code":"","Alias":""},
169 {"Name":"LDRSB (immediate)","Bits":"0|0|1|1|1|0|0|0|11:2|0|imm9:9|1|1|Rn:5|Rt:5","Arch":"Pre-index 32-bit variant","Syntax":"LDRSB <Wt>, [<Xn|SP>, #<simm>]!","Code":"","Alias":""},
170 {"Name":"LDRSB (immediate)","Bits":"0|0|1|1|1|0|0|0|10:2|0|imm9:9|1|1|Rn:5|Rt:5","Arch":"Pre-index 64-bit variant","Syntax":"LDRSB <Xt>, [<Xn|SP>, #<simm>]!","Code":"","Alias":""},
171 {"Name":"LDRSB (immediate)","Bits":"0|0|1|1|1|0|0|1|11:2|imm12:12|Rn:5|Rt:5","Arch":"Unsigned offset 32-bit variant","Syntax":"LDRSB <Wt>, [<Xn|SP>{, #<pimm>}]","Code":"","Alias":""}
[all...] |
| /external/pcre/dist2/src/sljit/ |
| sljitNativeARM_64.c | 783 /* s l */ 0x39800000 /* ldrsb [reg,imm] */,
797 /* s l */ 0x38800c00 /* ldrsb [reg,imm]! */,
804 /* s l */ 0x38a06800 /* ldrsb [reg,reg] */,
[all...] |
| /external/v8/src/compiler/arm64/ |
| code-generator-arm64.cc | [all...] |
