| /external/webp/src/dsp/ |
| lossless_msa.c | 94 ADD2(t0, t2, t1, t3, t0, t1); \
260 ADD2(src0, tmp0, src1, tmp1, dst0, dst1);
|
| filters_msa.c | 114 ADD2(a0, b0, a1, b1, a0, a1);
|
| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/fr30/ |
| allinsn.d | 13 0+0004 <add2>:
14 4: a5 f3 add2 -1,r3
|
| /external/libvpx/libvpx/vp8/encoder/mips/msa/ |
| quantize_msa.c | 136 ADD2(x0, round0, x1, round1, x0, x1);
|
| /external/llvm/test/CodeGen/AMDGPU/ |
| salu-to-valu.ll | 336 %add2 = add i32 %add1, %elt3
337 %add3 = add i32 %add2, %elt4
416 %add2 = add i32 %add1, %elt3
417 %add3 = add i32 %add2, %elt4
|
| /external/tensorflow/tensorflow/compiler/xla/tests/ |
| concat_test.cc | 514 // add1 add2 add3
529 auto add2 = builder.Add(mul, builder.ConstantR1<float>({3.f, 4.f})); local
531 builder.ConcatInDim({add1, add2, add3}, /*dimension=*/0);
|
| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/tic6x/ |
| insns-c674x.s | 117 add2 .S1 a7,a6,a5
118 [!b0] add2 .S1X a10,b9,a8
119 add2 .S2 b18,b17,b16
120 [b1] add2 .S2X b22,a29,b21
121 add2 .L1 a7,a6,a5
122 [a1] add2 .L1X a10,b9,a8
123 add2 .L2 b18,b17,b16
124 [!a1] add2 .L2X b22,a29,b21
125 add2 .D1 a7,a6,a5
126 [!b1] add2 .D1X a10,b9,a
[all...] |
| /toolchain/binutils/binutils-2.27/opcodes/ |
| arc-tbl.h | 304 /* add2<.f> a,b,c 00100bbb00010101FBBBCCCCCCAAAAAA. */
305 { "add2", 0x20150000, 0xF8FF0000, ARC_OPCODE_ARC600 | ARC_OPCODE_ARC700 | ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, ARITH, NONE, { RA, RB, RC }, { C_F }},
307 /* add2<.f> 0,b,c 00100bbb00010101FBBBCCCCCC111110. */
308 { "add2", 0x2015003E, 0xF8FF003F, ARC_OPCODE_ARC600 | ARC_OPCODE_ARC700 | ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, ARITH, NONE, { ZA, RB, RC }, { C_F }},
310 /* add2<.f><.cc> b,b,c 00100bbb11010101FBBBCCCCCC0QQQQQ. */
311 { "add2", 0x20D50000, 0xF8FF0020, ARC_OPCODE_ARC600 | ARC_OPCODE_ARC700 | ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, ARITH, NONE, { RB, RBdup, RC }, { C_F, C_CC }},
313 /* add2<.f> a,b,u6 00100bbb01010101FBBBuuuuuuAAAAAA. */
314 { "add2", 0x20550000, 0xF8FF0000, ARC_OPCODE_ARC600 | ARC_OPCODE_ARC700 | ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, ARITH, NONE, { RA, RB, UIMM6_20 }, { C_F }},
316 /* add2<.f> 0,b,u6 00100bbb01010101FBBBuuuuuu111110. */
317 { "add2", 0x2055003E, 0xF8FF003F, ARC_OPCODE_ARC600 | ARC_OPCODE_ARC700 | ARC_OPCODE_ARCv2EM | ARC_OPCODE_ (…)
[all...] |
| /external/llvm/test/Transforms/LoopVectorize/ |
| global_alias.ll | 308 %add2 = add nsw i32 %3, %4
313 store i32 %add2, i32* %arrayidx4, align 4
[all...] |
| /external/llvm/test/CodeGen/ARM/ |
| ehabi.ll | 392 %add2 = add nsw i32 %add1, %d
393 tail call void @throw_exception_3(i32 %add2)
398 %add6 = add nsw i32 %add5, %add2
|
| debug-frame.ll | 422 %add2 = add nsw i32 %add1, %d
423 tail call void @throw_exception_3(i32 %add2)
428 %add6 = add nsw i32 %add5, %add2
|
| /external/llvm/test/Analysis/DependenceAnalysis/ |
| Coupled.ll | 30 %add2 = add nsw i64 %i.02, 10
31 %arrayidx4 = getelementptr inbounds [100 x i32], [100 x i32]* %A, i64 %add2, i64 %add
66 %add2 = add nsw i64 %i.02, 9
67 %arrayidx4 = getelementptr inbounds [100 x i32], [100 x i32]* %A, i64 %add2, i64 %add
|
| StrongSIV.ll | 425 %add2 = add i64 %mul1, 5
426 %arrayidx3 = getelementptr inbounds i32, i32* %A, i64 %add2
|
| SymbolicSIV.ll | 219 %add2 = sub i64 %n, %i.03
220 %arrayidx3 = getelementptr inbounds i32, i32* %A, i64 %add2
|
| /external/libvpx/libvpx/vpx_dsp/mips/ |
| idct32x32_msa.c | 156 ADD2(reg5, reg4, reg3, reg2, vec0, vec1);
462 ADD2(reg5, reg4, reg3, reg2, vec0, vec1);
|
| /external/llvm/test/CodeGen/SystemZ/ |
| cond-store-01.ll | 287 %add2 = add i64 %add1, 4096
288 %ptr = inttoptr i64 %add2 to i8 *
|
| cond-store-02.ll | 287 %add2 = add i64 %add1, 4096
288 %ptr = inttoptr i64 %add2 to i16 *
|
| int-cmp-06.ll | 248 %add2 = add i64 %add1, 524284
249 %ptr = inttoptr i64 %add2 to i32 *
|
| vec-move-08.ll | 359 %add2 = add i64 %add1, 4095
360 %ptr = inttoptr i64 %add2 to i32 *
|
| vec-move-10.ll | 414 %add2 = add i64 %add1, 4095
415 %ptr = inttoptr i64 %add2 to i32 *
|
| /external/llvm/test/DebugInfo/COFF/ |
| inlining.ll | 244 %add2.i.i = add nsw i32 %7, 3, !dbg !25
245 store volatile i32 %add2.i.i, i32* @"\01?x@@3HC", align 4, !dbg !25, !tbaa !13
|
| /external/llvm/test/DebugInfo/X86/ |
| gnu-public-names.ll | 292 %add2 = add nsw i32 %add1, %3, !dbg !62
293 ret i32 %add2, !dbg !62
|
| /external/swiftshader/third_party/LLVM/test/Transforms/GVN/ |
| rle.ll | 627 %add2 = add nsw i32 %add, %conv3
631 %add3 = add nsw i32 %add2, %conv3
|
| /external/tensorflow/tensorflow/compiler/xla/service/ |
| hlo_computation_test.cc | 191 auto add2 = builder.AddInstruction(HloInstruction::CreateBinary( local
200 add1, add2, add3));
|
| /libcore/luni/src/test/java/libcore/java/math/ |
| OldBigDecimalArithmeticTest.java | 524 BigDecimal add2 = new BigDecimal("3849.235"); local
525 BigDecimal sum = add1.add(add2);
|
