| /external/apache-xml/src/main/java/org/apache/xml/serializer/ |
| ToTextSAXHandler.java | 202 String arg3, 278 Attributes arg3) 282 super.startElement(arg0, arg1, arg2, arg3);
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| /external/llvm/test/CodeGen/AMDGPU/ |
| sgpr-copy.ll | 14 define amdgpu_ps void @phi1(<16 x i8> addrspace(2)* inreg %arg, <16 x i8> addrspace(2)* inreg %arg1, <8 x i32> addrspace(2)* inreg %arg2, i32 inreg %arg3, <2 x i32> %arg4, <2 x i32> %arg5, <2 x i32> %arg6, <3 x i32> %arg7, <2 x i32> %arg8, <2 x i32> %arg9, <2 x i32> %arg10, float %arg11, float %arg12, float %arg13, float %arg14, float %arg15, float %arg16, float %arg17, float %arg18, float %arg19) #0 { 38 define amdgpu_ps void @phi2(<16 x i8> addrspace(2)* inreg %arg, <16 x i8> addrspace(2)* inreg %arg1, <8 x i32> addrspace(2)* inreg %arg2, i32 inreg %arg3, <2 x i32> %arg4, <2 x i32> %arg5, <2 x i32> %arg6, <3 x i32> %arg7, <2 x i32> %arg8, <2 x i32> %arg9, <2 x i32> %arg10, float %arg11, float %arg12, float %arg13, float %arg14, float %arg15, float %arg16, float %arg17, float %arg18, float %arg19) #0 { 61 %tmp40 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %arg3, <2 x i32> %arg5) 62 %tmp41 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %arg3, <2 x i32> %arg5) 63 %tmp42 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %arg3, <2 x i32> %arg5) 64 %tmp43 = call float @llvm.SI.fs.interp(i32 1, i32 1, i32 %arg3, <2 x i32> %arg5) 65 %tmp44 = call float @llvm.SI.fs.interp(i32 2, i32 1, i32 %arg3, <2 x i32> %arg5) 159 define amdgpu_ps void @loop(<16 x i8> addrspace(2)* inreg %arg, <16 x i8> addrspace(2)* inreg %arg1, <8 x i32> addrspace(2)* inreg %arg2, i32 inreg %arg3, <2 x i32> %arg4, <2 x i32> %arg5, <2 x i32> %arg6, <3 x i32> %arg7, <2 x i32> %arg8, <2 x i32> %arg9, <2 x i32> %arg10, float %arg11, float %arg12, float %arg13, float %arg14, float %arg15, float %arg16, float %arg17, float %arg18, float %arg19) #0 { 230 define amdgpu_ps void @sample_v3([17 x <16 x i8>] addrspace(2)* byval %arg, [32 x <16 x i8>] addrspace(2)* byval %arg1, [16 x <8 x i32>] addrspace(2)* byval %arg2, float inreg %arg3, i32 inreg %arg4, <2 x i32> %arg5, <2 x i32> %arg6, <2 x i32> %arg7, <3 x i32> %arg8, <2 x i32> %arg9, <2 x i32> %arg10, <2 x i32> %arg11, float %arg12, float %arg13, float %arg14, float %arg15, float %arg16, float %arg17, float %arg18, float %arg19, float %arg20) #0 { 294 define amdgpu_ps void @copy2([17 x <16 x i8>] addrspace(2)* byval %arg, [32 x <16 x i8>] addrspace(2)* byval %arg1, [16 x <8 x i32>] addrspace(2)* byval %arg2, float inreg %arg3, i32 inreg %arg4, <2 x i32> %arg5, <2 x i32> %arg6, <2 x i32> %arg7, <3 x i32> %arg8, <2 x i32> %a (…) [all...] |
| wait.ll | 14 define amdgpu_vs void @main(<16 x i8> addrspace(2)* inreg %arg, <16 x i8> addrspace(2)* inreg %arg1, <32 x i8> addrspace(2)* inreg %arg2, <16 x i8> addrspace(2)* inreg %arg3, <16 x i8> addrspace(2)* inreg %arg4, i32 inreg %arg5, i32 %arg6, i32 %arg7, i32 %arg8, i32 %arg9, float addrspace(2)* inreg %constptr) { 16 %tmp = getelementptr <16 x i8>, <16 x i8> addrspace(2)* %arg3, i32 0 25 %tmp16 = getelementptr <16 x i8>, <16 x i8> addrspace(2)* %arg3, i32 1
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| llvm.SI.load.dword.ll | 17 define amdgpu_vs void @main([17 x <16 x i8>] addrspace(2)* byval %arg, [32 x <16 x i8>] addrspace(2)* byval %arg1, [16 x <32 x i8>] addrspace(2)* byval %arg2, [2 x <16 x i8>] addrspace(2)* byval %arg3, [17 x <16 x i8>] addrspace(2)* inreg %arg4, [17 x <16 x i8>] addrspace(2)* inreg %arg5, i32 %arg6, i32 %arg7, i32 %arg8, i32 %arg9) { 19 %tmp = getelementptr [2 x <16 x i8>], [2 x <16 x i8>] addrspace(2)* %arg3, i64 0, i32 1
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| si-scheduler.ll | 19 define amdgpu_ps void @main([6 x <16 x i8>] addrspace(2)* byval %arg, [17 x <16 x i8>] addrspace(2)* byval %arg1, [17 x <4 x i32>] addrspace(2)* byval %arg2, [34 x <8 x i32>] addrspace(2)* byval %arg3, float inreg %arg4, i32 inreg %arg5, <2 x i32> %arg6, <2 x i32> %arg7, <2 x i32> %arg8, <3 x i32> %arg9, <2 x i32> %arg10, <2 x i32> %arg11, <2 x i32> %arg12, float %arg13, float %arg14, float %arg15, float %arg16, float %arg17, float %arg18, i32 %arg19, float %arg20, float %arg21) #0 { 21 %tmp = bitcast [34 x <8 x i32>] addrspace(2)* %arg3 to <32 x i8> addrspace(2)*
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| /external/llvm/test/Transforms/IndVarSimplify/ |
| eliminate-rem.ll | 10 define void @simple(i64 %arg, double* %arg3) nounwind { 21 %t8 = getelementptr inbounds double, double* %arg3, i64 %t7 ; <double*> [#uses=1] 41 define i32 @f(i64* %arg, i64 %arg1, i64 %arg2, i64 %arg3) nounwind {
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| /external/swiftshader/third_party/LLVM/test/Transforms/IndVarSimplify/ |
| eliminate-rem.ll | 10 define void @simple(i64 %arg, double* %arg3) nounwind { 21 %t8 = getelementptr inbounds double* %arg3, i64 %t7 ; <double*> [#uses=1] 41 define i32 @f(i64* %arg, i64 %arg1, i64 %arg2, i64 %arg3) nounwind {
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| /external/valgrind/coregrind/m_syswrap/ |
| syswrap-arm-linux.c | 239 ARG1, ARG2, ARG3, ARG4, ARG5, ARG6 ); 245 r = ML_(generic_PRE_sys_mmap)( tid, ARG1, ARG2, ARG3, ARG4, ARG5, 286 SARG1, ARG2, (HChar*)ARG2, ARG3); 290 PRE_MEM_WRITE( "fstatat64(buf)", ARG3, sizeof(struct vki_stat64) ); 295 POST_MEM_WRITE( ARG3, sizeof(struct vki_stat64) ); 370 PRINT("sys_sigsuspend ( %ld, %ld, %#lx )", SARG1, SARG2, ARG3 ); 388 PRINT("cacheflush (%lx, %#lx, %#lx)",ARG1,ARG2,ARG3); 396 // ARG3 is only used for pointers into the traced process's address 402 PRINT("sys_ptrace ( %ld, %ld, %#lx, %#lx )", SARG1, SARG2, ARG3, ARG4); 472 ML_(linux_PRE_getregset)(tid, ARG3, ARG4) [all...] |
| syswrap-mips32-linux.c | 217 UWord arg1, UWord arg2, UWord arg3, 276 UWord arg1, UWord arg2, UWord arg3, 336 sres = VG_(am_do_mmap_NO_NOTIFY)(advised, arg2, arg3, 354 sres = VG_(am_do_mmap_NO_NOTIFY)(advised, arg2, arg3, 365 arg3, /* prot */ 377 arg3, /* prot */ 427 r = mips_PRE_sys_mmap(tid, ARG1, ARG2, ARG3, ARG4, ARG5, 439 r = mips_PRE_sys_mmap(tid, ARG1, ARG2, ARG3, ARG4, ARG5, (Off64T) ARG6); 445 PRINT("sys_ptrace ( %ld, %ld, %#lx, %#lx )", SARG1, SARG2, ARG3, ARG4); 465 ML_(linux_PRE_getregset)(tid, ARG3, ARG4) [all...] |
| /bionic/libc/arch-x86_64/bionic/ |
| syscall.S | 36 * %rcx: arg3 - syscall expects it at %r10
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| /device/linaro/bootloader/edk2/Vlv2DeviceRefCodePkg/AcpiTablesPCAT/ |
| UsbSbd.asl | 44 // Arg3: Package Parameters
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| /external/apache-harmony/support/src/test/java/tests/support/ |
| Support_DummyPKCS12Keystore.java | 65 Certificate[] arg3) throws KeyStoreException {
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| /external/dng_sdk/source/ |
| dng_safe_arithmetic.h | 85 bool SafeUint32Mult(std::uint32_t arg1, std::uint32_t arg2, std::uint32_t arg3, 87 bool SafeUint32Mult(std::uint32_t arg1, std::uint32_t arg2, std::uint32_t arg3, 95 std::uint32_t arg3); 97 std::uint32_t arg3, std::uint32_t arg4);
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| /external/eigen/unsupported/Eigen/CXX11/src/Tensor/ |
| TensorSyclExtractAccessor.h | 55 template<typename Arg1, typename Arg2, typename Arg3> static inline auto getTuple(cl::sycl::handler& cgh, Arg1 eval1 , Arg2 eval2 , Arg3 eval3) 56 -> decltype(utility::tuple::append(ExtractAccessor<Arg1>::getTuple(cgh, eval1),utility::tuple::append(ExtractAccessor<Arg2>::getTuple(cgh, eval2), ExtractAccessor<Arg3>::getTuple(cgh, eval3)))) { 57 return utility::tuple::append(ExtractAccessor<Arg1>::getTuple(cgh, eval1),utility::tuple::append(ExtractAccessor<Arg2>::getTuple(cgh, eval2), ExtractAccessor<Arg3>::getTuple(cgh, eval3)));
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| /external/ltp/testcases/misc/crash/ |
| crash02.c | 419 long int sysno, arg1, arg2, arg3, arg4, arg5, arg6, arg7; local 427 arg3 = rand_long(); 437 try_num, sysno, arg1, arg2, arg3, arg4, arg5, 440 syscall(sysno, arg1, arg2, arg3, arg4, arg5, arg6, arg7);
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| /frameworks/compile/slang/lit-tests/padding/ |
| more_structs.rs | 71 // CHECK-JAVA-INVOKE: public void invoke_check_five_struct(byte arg1, long arg2, short arg3, long arg4, short arg5) { 76 // CHECK-JAVA-INVOKE-NEXT: check_five_struct_fp.addI16(arg3); 116 void check_five_struct(char arg1, long arg2, short arg3, long arg4, half arg5) { 119 (g_five_struct.f3 != arg3) ||
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| /hardware/google/av/codec2/hidl/services/seccomp_policy/ |
| codec2.software.base-arm.policy | 37 mremap: arg3 == 3
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| codec2.vendor.base-arm.policy | 37 mremap: arg3 == 3
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| /external/deqp/external/vulkancts/modules/vulkan/shaderexecutor/ |
| vktShaderBuiltinPrecisionTests.cpp | 1111 typedef P3 Arg3; 1116 typedef typename Traits<Arg3>::IVal IArg3; 1118 typedef Tuple4< const Arg0&, const Arg1&, const Arg2&, const Arg3&> Args; 1120 typedef Tuple4< ExprP<Arg0>, ExprP<Arg1>, ExprP<Arg2>, ExprP<Arg3> > ArgExprs; [all...] |
| /external/deqp/modules/glshared/ |
| glsBuiltinPrecisionTests.cpp | 1145 typedef P3 Arg3; 1150 typedef typename Traits<Arg3>::IVal IArg3; 1152 typedef Tuple4< const Arg0&, const Arg1&, const Arg2&, const Arg3&> Args; [all...] |
| /art/test/1945-proxy-method-arguments/src/ |
| Main.java | 24 void method10(String arg1, String arg2, String arg3, String arg4, String arg5, 26 void method10Even(byte arg1, String arg2, short arg3, String arg4, int arg5,
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| /external/clang/lib/CodeGen/ |
| CGCUDABuiltin.cpp | 51 // printf("format string", arg1, arg2, arg3); 58 // Arg3 a3;
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| /external/clang/test/CodeGenObjC/ |
| encode-test.m | 69 - (SEL**) meth : (SEL) arg : (SEL*****) arg1 : (SEL*)arg2 : (SEL**) arg3; 74 - (SEL**) meth : (SEL) arg : (SEL*****) arg1 : (SEL*)arg2 : (SEL**) arg3 {}
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| /external/libjpeg-turbo/simd/ |
| jfdctfst-altivec.c | 27 * vec_madds(arg1, arg2, arg3) generates the 16-bit saturated sum of: 28 * the elements in arg3 + the most significant 17 bits of
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| /external/llvm/test/CodeGen/X86/ |
| hipe-cc64.ll | 39 define cc 11 void @foo(i64 %hp, i64 %p, i64 %arg0, i64 %arg1, i64 %arg2, i64 %arg3) nounwind { 58 store i64 %arg3, i64* %arg3_var
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