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  /external/llvm/test/CodeGen/AArch64/
directcond.ll 54 %val = fcmp oeq float %lhs, %rhs
55 ; CHECK: fcmp s0, s1
57 ; CHECK-NOFP-NOT: fcmp
63 %val = fcmp oeq double %lhs, %rhs
64 ; CHECK: fcmp d0, d1
66 ; CHECK-NOFP-NOT: fcmp
arm64-fmax-safe.ll 5 %cmp = fcmp olt float %in, 0.000000e+00
15 %cmp = fcmp ult float %in, 0.000000e+00
27 %cmp = fcmp olt float %in, 0.000000e+00
39 %tst = fcmp une float %lhs, %rhs
  /external/llvm/test/CodeGen/AMDGPU/
fcmp64.ll 10 %r2 = fcmp ult double %r0, %r1
22 %r2 = fcmp ule double %r0, %r1
34 %r2 = fcmp ugt double %r0, %r1
46 %r2 = fcmp uge double %r0, %r1
58 %r2 = fcmp une double %r0, %r1
70 %r2 = fcmp ueq double %r0, %r1
set-dx10.ll 13 %0 = fcmp une float %in, 5.0
27 %0 = fcmp une float %in, 5.0
39 %0 = fcmp oeq float %in, 5.0
53 %0 = fcmp oeq float %in, 5.0
65 %0 = fcmp ogt float %in, 5.0
79 %0 = fcmp ogt float %in, 5.0
91 %0 = fcmp oge float %in, 5.0
105 %0 = fcmp oge float %in, 5.0
117 %0 = fcmp ole float %in, 5.0
131 %0 = fcmp ole float %in, 5.
    [all...]
selectcc-cnd.ll 8 %2 = fcmp oeq float %1, 0.0
  /external/llvm/test/CodeGen/ARM/
vsel.ll 96 %tst1 = fcmp ogt float %lhs32, %rhs32
105 %tst1 = fcmp ogt float %lhs32, %rhs32
114 %tst1 = fcmp oge float %lhs32, %rhs32
123 %tst1 = fcmp oge float %lhs32, %rhs32
132 %tst1 = fcmp oeq float %lhs32, %rhs32
141 %tst1 = fcmp oeq float %lhs32, %rhs32
150 %tst1 = fcmp ugt float %lhs32, %rhs32
159 %tst1 = fcmp ugt float %lhs32, %rhs32
168 %tst1 = fcmp uge float %lhs32, %rhs32
177 %tst1 = fcmp uge float %lhs32, %rhs3
    [all...]
vfcmp.ll 3 ; This tests fcmp operations that do not map directly to NEON instructions.
12 %tmp3 = fcmp une <2 x float> %tmp1, %tmp2
23 %tmp3 = fcmp olt <2 x float> %tmp1, %tmp2
34 %tmp3 = fcmp ole <2 x float> %tmp1, %tmp2
46 %tmp3 = fcmp uge <2 x float> %tmp1, %tmp2
58 %tmp3 = fcmp ule <2 x float> %tmp1, %tmp2
70 %tmp3 = fcmp ugt <2 x float> %tmp1, %tmp2
82 %tmp3 = fcmp ult <2 x float> %tmp1, %tmp2
96 %tmp3 = fcmp ueq <2 x float> %tmp1, %tmp2
109 %tmp3 = fcmp one <2 x float> %tmp1, %tmp
    [all...]
2009-09-09-fpcmp-ole.ll 8 %4 = fcmp ugt double %2, %3
fpcmp-f64-neon-opt.ll 9 %cmp = fcmp une double %x, 0.000000e+00
fpcmp_ueq.ll 12 %tmp = fcmp ueq float %a,%b
  /external/llvm/test/CodeGen/Hexagon/
i16_VarArg.ll 25 %lt_r = fcmp olt double %a, %b
26 %le_r = fcmp ole double %a, %b
27 %gt_r = fcmp ogt double %a, %b
28 %ge_r = fcmp oge double %a, %b
29 %eq_r = fcmp oeq double %a, %b
30 %ne_r = fcmp une double %a, %b
i1_VarArg.ll 25 %lt_r = fcmp olt double %a, %b
26 %le_r = fcmp ole double %a, %b
27 %gt_r = fcmp ogt double %a, %b
28 %ge_r = fcmp oge double %a, %b
29 %eq_r = fcmp oeq double %a, %b
30 %ne_r = fcmp une double %a, %b
i8_VarArg.ll 25 %lt_r = fcmp olt double %a, %b
26 %le_r = fcmp ole double %a, %b
27 %gt_r = fcmp ogt double %a, %b
28 %ge_r = fcmp oge double %a, %b
29 %eq_r = fcmp oeq double %a, %b
30 %ne_r = fcmp une double %a, %b
  /external/llvm/test/CodeGen/SystemZ/
fp-cmp-05.ll 15 %cond = fcmp oeq float %neg, 0.0
26 %cond = fcmp oeq double %neg, 0.0
40 %cond = fcmp oeq float %neg, 0.0
53 %cond = fcmp oeq double %neg, 0.0
65 %cond = fcmp oeq float %abs, 0.0
76 %cond = fcmp oeq double %abs, 0.0
  /external/llvm/test/Transforms/IndVarSimplify/
floating-point-iv.ll 10 %2 = fcmp olt double %1, 1.000000e+04 ; <i1> [#uses=1]
29 %2 = fcmp olt double %1, -1.000000e+00 ; <i1> [#uses=1]
47 %2 = fcmp olt double %1, -1.000000e+00
53 ; CHECK: fcmp
64 %2 = fcmp olt double %1, 1.000000e+00 ; <i1> [#uses=1]
83 %5 = fcmp ult double %4, 0.000000e+00 ; <i1> [#uses=1]
  /external/swiftshader/third_party/LLVM/test/Transforms/IndVarSimplify/
floating-point-iv.ll 10 %2 = fcmp olt double %1, 1.000000e+04 ; <i1> [#uses=1]
29 %2 = fcmp olt double %1, -1.000000e+00 ; <i1> [#uses=1]
47 %2 = fcmp olt double %1, -1.000000e+00
53 ; CHECK: fcmp
64 %2 = fcmp olt double %1, 1.000000e+00 ; <i1> [#uses=1]
83 %5 = fcmp ult double %4, 0.000000e+00 ; <i1> [#uses=1]
  /external/llvm/test/CodeGen/Mips/
2008-07-23-fpcmp.ll 14 fcmp ogt float %a, 1.000000e+00 ; <i1>:0 [#uses=1]
27 fcmp ogt float %a, 1.000000e+00 ; <i1>:0 [#uses=1]
34 fcmp ogt float %j, 1.000000e+00 ; <i1>:0 [#uses=1]
  /external/llvm/test/CodeGen/X86/
2012-04-09-TwoAddrPassBug.ll 17 %7 = fcmp olt double %6, 0.000000e+00
19 %9 = fcmp olt double undef, 0.000000e+00
20 %10 = fcmp olt double %8, undef
  /external/llvm/test/Transforms/CodeGenPrepare/X86/
select.ll 10 %cmp = fcmp olt double %load, %a
16 ; CHECK: %cmp = fcmp olt double %load, %a
27 %cmp = fcmp ogt float %a, 1.0
32 ; CHECK: %cmp = fcmp ogt float %a, 1.0
45 %cmp = fcmp ogt float %a, 3.0
50 ; CHECK: %cmp = fcmp ogt float %a, 3.0
64 %cmp = fcmp ogt float %a, 5.0
69 ; CHECK: %cmp = fcmp ogt float %a, 5.0
88 ; CHECK-NEXT: [[CMP:%.*]] = fcmp ogt float %a, 1.000000e+00
94 %cmp = fcmp ogt float %a, 1.
    [all...]
  /external/swiftshader/third_party/LLVM/test/CodeGen/Mips/
2008-07-23-fpcmp.ll 14 fcmp ogt float %a, 1.000000e+00 ; <i1>:0 [#uses=1]
27 fcmp ogt float %a, 1.000000e+00 ; <i1>:0 [#uses=1]
34 fcmp ogt float %j, 1.000000e+00 ; <i1>:0 [#uses=1]
analyzebranch.ll 9 %cmp = fcmp ogt double %a, 0.000000e+00
13 %cmp3 = fcmp ogt double %b, 0.000000e+00
32 %cmp = fcmp une float %f, 0.000000e+00
  /external/swiftshader/third_party/LLVM/test/Transforms/InstCombine/
and2.ll 5 %tmp9 = fcmp ord double %X, 0.000000e+00
6 %tmp13 = fcmp ord double %Y, 0.000000e+00
9 ; CHECK: fcmp ord double %Y, %X
  /external/llvm/test/CodeGen/Generic/
2009-04-10-SinkCrash.ll 8 %tmp.213 = fcmp une double %tmp.212, 0.000000e+00 ; <i1> [#uses=1]
select-cc.ll 6 %x.lo.ge = fcmp oge double %x.lo, 0.000000e+00 ; <i1> [#uses=1]
  /external/llvm/test/CodeGen/PowerPC/
select-cc.ll 6 %x.lo.ge = fcmp oge double %x.lo, 0.000000e+00 ; <i1> [#uses=1]

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